| /external/llvm-project/llvm/test/CodeGen/ARM/GlobalISel/ |
| D | arm-instruction-select-cmp.mir | 426 ; CHECK: FMSTAT 14 /* CC::al */, $noreg, implicit-def $cpsr, implicit $fpscr_nzcv
457 ; CHECK: FMSTAT 14 /* CC::al */, $noreg, implicit-def $cpsr, implicit $fpscr_nzcv
488 ; CHECK: FMSTAT 14 /* CC::al */, $noreg, implicit-def $cpsr, implicit $fpscr_nzcv
519 ; CHECK: FMSTAT 14 /* CC::al */, $noreg, implicit-def $cpsr, implicit $fpscr_nzcv
550 ; CHECK: FMSTAT 14 /* CC::al */, $noreg, implicit-def $cpsr, implicit $fpscr_nzcv
581 ; CHECK: FMSTAT 14 /* CC::al */, $noreg, implicit-def $cpsr, implicit $fpscr_nzcv
612 ; CHECK: FMSTAT 14 /* CC::al */, $noreg, implicit-def $cpsr, implicit $fpscr_nzcv
643 ; CHECK: FMSTAT 14 /* CC::al */, $noreg, implicit-def $cpsr, implicit $fpscr_nzcv
674 ; CHECK: FMSTAT 14 /* CC::al */, $noreg, implicit-def $cpsr, implicit $fpscr_nzcv
705 ; CHECK: FMSTAT 14 /* CC::al */, $noreg, implicit-def $cpsr, implicit $fpscr_nzcv
[all …]
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| /external/llvm-project/llvm/test/CodeGen/ARM/ |
| D | fp16-litpool2-arm.mir | 94 FMSTAT 14, $noreg, implicit-def $cpsr, implicit killed $fpscr_nzcv
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| D | fp16-litpool3-arm.mir | 100 FMSTAT 14, $noreg, implicit-def $cpsr, implicit killed $fpscr_nzcv
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | ARMScheduleM4.td | 132 def : M4UnitL1I<(instregex "VMRS", "VMSR", "FMSTAT")>;
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| D | ARMISelLowering.h | 90 FMSTAT, // ARM fmstat instruction. enumerator
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| D | Thumb2SizeReduction.cpp | 264 case ARM::FMSTAT: in isHighLatencyCPSR()
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| D | ARMInstructionSelector.cpp | 1057 CmpConstants Helper(Size == 32 ? ARM::VCMPS : ARM::VCMPD, ARM::FMSTAT, in select()
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| D | ARMScheduleSwift.td | 671 def : InstRW<[SwiftWriteP0TwoCycle], (instregex "FMSTAT")>;
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| D | ARMInstrVFP.td | 21 def arm_fmstat : SDNode<"ARMISD::FMSTAT", SDTNone, [SDNPInGlue, SDNPOutGlue]>;
2341 def FMSTAT : MovFromVFP<0b0001 /* fpscr */, (outs), (ins),
2585 def : InstAlias<"fmstat${p}", (FMSTAT pred:$p), 0>, Requires<[HasFPRegs]>;
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| D | ARMScheduleA57.td | 137 def : InstRW<[WriteNoop], (instregex "VMRS", "VMSR", "FMSTAT")>;
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| D | ARMFastISel.cpp | 1465 TII.get(ARM::FMSTAT))); in ARMEmitCmp()
|
| /external/llvm-project/llvm/lib/Target/ARM/ |
| D | ARMScheduleM4.td | 132 def : M4UnitL1I<(instregex "VMRS", "VMSR", "FMSTAT")>;
|
| D | ARMISelLowering.h | 92 FMSTAT, // ARM fmstat instruction. enumerator
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| D | ARMScheduleM7.td | 430 def : InstRW<[M7VMRS], (instregex "FMSTAT")>;
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| D | Thumb2SizeReduction.cpp | 264 case ARM::FMSTAT: in isHighLatencyCPSR()
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| D | ARMInstructionSelector.cpp | 1055 CmpConstants Helper(Size == 32 ? ARM::VCMPS : ARM::VCMPD, ARM::FMSTAT, in select()
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| D | ARMScheduleSwift.td | 671 def : InstRW<[SwiftWriteP0TwoCycle], (instregex "FMSTAT")>;
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| D | ARMInstrVFP.td | 21 def arm_fmstat : SDNode<"ARMISD::FMSTAT", SDTNone, [SDNPInGlue, SDNPOutGlue]>;
2437 def FMSTAT : MovFromVFP<0b0001 /* fpscr */, (outs), (ins),
2686 def : InstAlias<"fmstat${p}", (FMSTAT pred:$p), 0>, Requires<[HasFPRegs]>;
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| D | ARMScheduleA57.td | 125 def : InstRW<[WriteNoop], (instregex "VMRS", "VMSR", "FMSTAT")>;
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| D | ARMFastISel.cpp | 1452 TII.get(ARM::FMSTAT))); in ARMEmitCmp()
|
| /external/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.h | 59 FMSTAT, // ARM fmstat instruction. enumerator
|
| D | Thumb2SizeReduction.cpp | 238 case ARM::FMSTAT: in isHighLatencyCPSR()
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| D | ARMInstrVFP.td | 18 def arm_fmstat : SDNode<"ARMISD::FMSTAT", SDTNone, [SDNPInGlue, SDNPOutGlue]>;
2073 def FMSTAT : MovFromVFP<0b0001 /* fpscr */, (outs), (ins),
2251 def : VFP2InstAlias<"fmstat${p}", (FMSTAT pred:$p)>;
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| D | ARMScheduleSwift.td | 659 def : InstRW<[SwiftWriteP0TwoCycle], (instregex "FMSTAT")>;
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| /external/capstone/arch/ARM/ |
| D | ARMGenAsmWriter.inc | 127 1088010U, // FMSTAT
2931 0U, // FMSTAT
6137 // BX_RET, ERET, FMSTAT, MOVPCLR, t2CLREX, t2DCPS1, t2DCPS2, t2DCPS3, tBL...
6291 // FMSTAT
8857 // (FMSTAT pred:$p)
|