| /external/llvm-project/llvm/test/CodeGen/SPARC/ |
| D | disable-fsmuld-fmuls.ll | 2 …lc %s -march=sparc -mattr=no-fmuls -o - | FileCheck --check-prefix=CHECK --check-prefix=NO-FMULS %s
13 ; NO-FMULS: fsmuld
14 ; NO-FMULS: fdtos
|
| /external/llvm/lib/Target/Sparc/ |
| D | LeonFeatures.td | 61 "LEON3 erratum fix: Replace FMULS instruction with a "
63 "to replace FMULS">;
|
| D | LeonPasses.cpp | 258 if (Opcode == SP::FMULS && MI.getNumOperands() == 3) { in runOnMachineFunction()
861 case SP::FMULS: in runOnMachineFunction()
|
| D | SparcInstrInfo.td | 1235 // FMULS generates an erratum on LEON processors, so by disabling this instruction
1238 def FMULS : F3_3<2, 0b110100, 0b001001001,
|
| /external/llvm/lib/Target/AVR/ |
| D | AVRInstrFormats.td | 279 // 0b10 for FMULS
|
| D | AVRInstrInfo.td | 536 def FMULS : FFMULRdRr<0b10,
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AVR/ |
| D | AVRInstrFormats.td | 280 // 0b10 for FMULS
|
| D | AVRInstrInfo.td | 578 def FMULS : FFMULRdRr<0b10,
|
| /external/pcre/dist2/src/sljit/ |
| D | sljitNativeSPARC_common.c | 151 #define FMULS (OPC1(0x2) | OPC3(0x34) | DOP(0x49)) macro
1221 …FAIL_IF(push_inst(compiler, SELECT_FOP(op, FMULS, FMULD) | FD(dst_r) | FS1(src1) | FS2(src2), MOVA… in sljit_emit_fop2()
|
| D | sljitNativePPC_common.c | 179 #define FMULS (HI(59) | LO(25)) macro
1852 …FAIL_IF(push_inst(compiler, SELECT_FOP(op, FMULS, FMUL) | FD(dst_r) | FA(src1) | FC(src2) /* FMUL … in sljit_emit_fop2()
|
| /external/llvm-project/llvm/lib/Target/AVR/ |
| D | AVRInstrFormats.td | 288 // 0b10 for FMULS
|
| D | AVRInstrInfo.td | 584 def FMULS : FFMULRdRr<0b10,
|
| /external/llvm-project/llvm/lib/Target/X86/ |
| D | X86ISelLowering.h | 218 FMULS, enumerator
|
| D | X86IntrinsicsInfo.h | 633 X86ISD::FMULS, X86ISD::FMULS_RND),
635 X86ISD::FMULS, X86ISD::FMULS_RND),
|
| D | X86InstrFragmentsSIMD.td | 520 def X86fmuls : SDNode<"X86ISD::FMULS", SDTFPBinOp>;
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86IntrinsicsInfo.h | 633 X86ISD::FMULS, X86ISD::FMULS_RND),
635 X86ISD::FMULS, X86ISD::FMULS_RND),
|
| D | X86ISelLowering.h | 209 FMUL_RND, FMULS, FMULS_RND, enumerator
|
| D | X86InstrFragmentsSIMD.td | 511 def X86fmuls : SDNode<"X86ISD::FMULS", SDTFPBinOp>;
|
| /external/llvm/lib/Target/PowerPC/ |
| D | PPCInstrInfo.cpp | 206 case PPC::FMULS: in isAssociativeAndCommutative()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/ |
| D | P9InstrResources.td | 426 FMULS,
|
| /external/llvm-project/llvm/lib/Target/PowerPC/ |
| D | P9InstrResources.td | 427 FMULS,
|
| D | PPCInstrInfo.cpp | 249 case PPC::FMULS: in isAssociativeAndCommutative()
295 {PPC::FMADDS, PPC::FADDS, PPC::FMULS, 3, 1}};
|
| /external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/PowerPC/ |
| D | PPCGenMCCodeEmitter.inc | 945 UINT64_C(3959423026), // FMULS
3500 case PPC::FMULS:
7355 CEFBS_None, // FMULS = 932
|
| /external/capstone/arch/Sparc/ |
| D | SparcGenDisassemblerTables.inc | 620 /* 2385 */ MCD_OPC_Decode, 224, 1, 26, // Opcode: FMULS
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Sparc/ |
| D | SparcInstrInfo.td | 1243 def FMULS : F3_3<2, 0b110100, 0b001001001,
|