| /external/llvm/lib/Target/X86/ |
| D | X86IntrinsicsInfo.h | 1518 X86_INTRINSIC_DATA(avx512_mask_vfnmsub_pd_128, FMA_OP_MASK, X86ISD::FNMSUB, 0),
1519 X86_INTRINSIC_DATA(avx512_mask_vfnmsub_pd_256, FMA_OP_MASK, X86ISD::FNMSUB, 0),
1520 X86_INTRINSIC_DATA(avx512_mask_vfnmsub_pd_512, FMA_OP_MASK, X86ISD::FNMSUB,
1522 X86_INTRINSIC_DATA(avx512_mask_vfnmsub_ps_128, FMA_OP_MASK, X86ISD::FNMSUB, 0),
1523 X86_INTRINSIC_DATA(avx512_mask_vfnmsub_ps_256, FMA_OP_MASK, X86ISD::FNMSUB, 0),
1524 X86_INTRINSIC_DATA(avx512_mask_vfnmsub_ps_512, FMA_OP_MASK, X86ISD::FNMSUB,
1667 X86_INTRINSIC_DATA(avx512_mask3_vfnmsub_pd_128, FMA_OP_MASK3, X86ISD::FNMSUB, 0),
1668 X86_INTRINSIC_DATA(avx512_mask3_vfnmsub_pd_256, FMA_OP_MASK3, X86ISD::FNMSUB, 0),
1669 X86_INTRINSIC_DATA(avx512_mask3_vfnmsub_pd_512, FMA_OP_MASK3, X86ISD::FNMSUB,
1671 X86_INTRINSIC_DATA(avx512_mask3_vfnmsub_ps_128, FMA_OP_MASK3, X86ISD::FNMSUB, 0),
[all …]
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| D | X86ISelLowering.h | 477 FNMSUB, enumerator
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| D | X86InstrFragmentsSIMD.td | 472 def X86Fnmsub : SDNode<"X86ISD::FNMSUB", SDTFma>;
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| D | X86ISelLowering.cpp | 22287 case X86ISD::FNMSUB: return "X86ISD::FNMSUB"; in getTargetNodeName()
29751 return DAG.getNode(X86ISD::FNMSUB, DL, VT, Arg.getOperand(0), in combineFneg()
29760 return DAG.getNode(X86ISD::FNMSUB, DL, VT, Arg.getOperand(0), in combineFneg()
29768 case X86ISD::FNMSUB: in combineFneg()
30231 Opcode = (!NegC) ? X86ISD::FNMADD : X86ISD::FNMSUB; in combineFMA()
|
| /external/llvm-project/llvm/lib/Target/X86/MCTargetDesc/ |
| D | X86InstComments.cpp | 359 CASE_FMA4_PACKED_RR(FNMSUB) in printFMAComments()
360 CASE_FMA4_SCALAR_RR(FNMSUB) in printFMAComments()
363 CASE_FMA4_PACKED_RM(FNMSUB) in printFMAComments()
364 CASE_FMA4_SCALAR_RM(FNMSUB) in printFMAComments()
370 CASE_FMA4_PACKED_MR(FNMSUB) in printFMAComments()
371 CASE_FMA4_SCALAR_MR(FNMSUB) in printFMAComments()
|
| /external/llvm-project/llvm/lib/Target/PowerPC/ |
| D | PPCISelLowering.h | 171 FNMSUB, enumerator
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| D | P9InstrResources.td | 424 FNMSUB,
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| D | PPCISelLowering.cpp | 1570 case PPCISD::FNMSUB: return "PPCISD::FNMSUB"; in getTargetNodeName()
14762 case PPCISD::FNMSUB: in PerformDAGCombine()
16371 return PPCISD::FNMSUB; in invertFMAOpcode()
16372 case PPCISD::FNMSUB: in invertFMAOpcode()
16389 case PPCISD::FNMSUB: in getNegatedExpression()
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| D | PPCInstrInfo.td | 247 def PPCfnmsub : SDNode<"PPCISD::FNMSUB" , SDTFPTernaryOp>;
3181 defm FNMSUB : AForm_1r<63, 30,
3524 (FNMSUB $A, $B, $C)>;
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| /external/llvm-project/llvm/lib/Target/X86/ |
| D | X86ISelLowering.h | 553 FNMSUB, enumerator
|
| D | X86InstrFragmentsSIMD.td | 553 def X86Fnmsub : SDNode<"X86ISD::FNMSUB", SDTFPTernaryOp, [SDNPCommutative]>;
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| D | X86ISelLowering.cpp | 30966 NODE_NAME_CASE(FNMSUB) in getTargetNodeName()
45916 case X86ISD::FMSUB: Opcode = X86ISD::FNMSUB; break; in negateFMAOpcode()
45922 case X86ISD::FNMSUB: Opcode = X86ISD::FMSUB; break; in negateFMAOpcode()
45937 case X86ISD::FNMADD: Opcode = X86ISD::FNMSUB; break; in negateFMAOpcode()
45940 case X86ISD::FNMSUB: Opcode = X86ISD::FNMADD; break; in negateFMAOpcode()
45954 case ISD::FMA: Opcode = X86ISD::FNMSUB; break; in negateFMAOpcode()
45960 case X86ISD::FNMSUB: Opcode = ISD::FMA; break; in negateFMAOpcode()
45992 SDValue NewNode = DAG.getNode(X86ISD::FNMSUB, DL, VT, Arg.getOperand(0), in combineFneg()
46024 case X86ISD::FNMSUB: in getNegatedExpression()
49866 case X86ISD::FNMSUB: in PerformDAGCombine()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86ISelLowering.h | 473 FNMSUB, enumerator
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| D | X86InstrFragmentsSIMD.td | 539 def X86Fnmsub : SDNode<"X86ISD::FNMSUB", SDTFPTernaryOp, [SDNPCommutative]>;
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| D | X86ISelLowering.cpp | 29821 case X86ISD::FNMSUB: return "X86ISD::FNMSUB"; in getTargetNodeName()
42519 case X86ISD::FMSUB: Opcode = X86ISD::FNMSUB; break; in negateFMAOpcode()
42523 case X86ISD::FNMSUB: Opcode = X86ISD::FMSUB; break; in negateFMAOpcode()
42535 case X86ISD::FNMADD: Opcode = X86ISD::FNMSUB; break; in negateFMAOpcode()
42537 case X86ISD::FNMSUB: Opcode = X86ISD::FNMADD; break; in negateFMAOpcode()
42549 case ISD::FMA: Opcode = X86ISD::FNMSUB; break; in negateFMAOpcode()
42555 case X86ISD::FNMSUB: Opcode = ISD::FMA; break; in negateFMAOpcode()
42585 SDValue NewNode = DAG.getNode(X86ISD::FNMSUB, DL, VT, Arg.getOperand(0), in combineFneg()
42597 case X86ISD::FNMSUB: in combineFneg()
42632 case X86ISD::FNMSUB: in isNegatibleForFree()
[all …]
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/ |
| D | P9InstrResources.td | 423 FNMSUB,
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| D | PPCInstrInfo.td | 2968 defm FNMSUB : AForm_1r<63, 30,
3305 // Additional FNMSUB patterns: -a*c + b == -(a*c - b)
3307 (FNMSUB $A, $C, $B)>;
3309 (FNMSUB $A, $C, $B)>;
|
| /external/llvm/lib/Target/PowerPC/ |
| D | PPCInstrInfo.td | 2559 defm FNMSUB : AForm_1r<63, 30,
2872 // Additional FNMSUB patterns: -a*c + b == -(a*c - b)
2874 (FNMSUB $A, $C, $B)>;
2876 (FNMSUB $A, $C, $B)>;
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| /external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/PowerPC/ |
| D | PPCGenMCCodeEmitter.inc | 960 UINT64_C(4227858492), // FNMSUB
3537 case PPC::FNMSUB:
7370 CEFBS_None, // FNMSUB = 947
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| /external/llvm-project/llvm/lib/Target/AArch64/ |
| D | AArch64SchedThunderX3T110.td | 1289 (instregex "^FMADD", "^FMSUB", "^FNMADD", "^FNMSUB")>;
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| D | AArch64SchedThunderX2T99.td | 1181 (instregex "^FMADD", "^FMSUB", "^FNMADD", "^FNMSUB")>;
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64SchedThunderX2T99.td | 1181 (instregex "^FMADD", "^FMSUB", "^FNMADD", "^FNMSUB")>;
|
| /external/vixl/src/aarch64/ |
| D | disasm-aarch64.cc | 1887 FORMAT(FNMSUB, "fnmsub"); in VisitFPDataProcessing3Source()
|
| /external/capstone/arch/PowerPC/ |
| D | PPCGenAsmWriter.inc | 561 18900U, // FNMSUB
2083 80U, // FNMSUB
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| D | PPCGenDisassemblerTables.inc | 2367 /* 9945 */ MCD_OPC_Decode, 157, 4, 112, // Opcode: FNMSUB
|