Searched refs:FP16_ONE (Results 1 – 7 of 7) sorted by relevance
| /external/mesa3d/src/util/ |
| D | half_float.h | 42 #define FP16_ONE ((uint16_t) 0x3c00) macro
127 static float16_t one() { return float16_t(FP16_ONE); } in one()
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| D | half_float.c | 188 assert(s == 0 && val <= FP16_ONE); /* check 0 <= this <= 1 */ in _mesa_half_to_unorm8()
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| /external/mesa3d/src/mesa/main/ |
| D | texcompress_astc.cpp | 665 output[i*4+0] = FP16_ONE; in decode()
667 output[i*4+2] = FP16_ONE; in decode()
668 output[i*4+3] = FP16_ONE; in decode()
1714 output[idx*4+0] = c[0] == 65535 ? FP16_ONE : _mesa_uint16_div_64k_to_half(c[0]); in write_decoded()
1715 output[idx*4+1] = c[1] == 65535 ? FP16_ONE : _mesa_uint16_div_64k_to_half(c[1]); in write_decoded()
1716 output[idx*4+2] = c[2] == 65535 ? FP16_ONE : _mesa_uint16_div_64k_to_half(c[2]); in write_decoded()
1717 output[idx*4+3] = c[3] == 65535 ? FP16_ONE : _mesa_uint16_div_64k_to_half(c[3]); in write_decoded()
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| /external/llvm-project/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUInstructions.td | 532 int FP16_ONE = 0x3C00;
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| D | SIInstructions.td | 2054 (V_MUL_F16_e64 0, (i32 CONST.FP16_ONE), $src_mods, $src)
2064 (V_PK_MUL_F16 0, (i32 CONST.FP16_ONE), $src_mods, $src, DSTCLAMP.NONE)
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUInstructions.td | 524 int FP16_ONE = 0x3C00;
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| D | SIInstructions.td | 1705 (V_MUL_F16_e64 0, (i32 CONST.FP16_ONE), $src_mods, $src, 0, 0)
1715 (V_PK_MUL_F16 0, (i32 CONST.FP16_ONE), $src_mods, $src, DSTCLAMP.NONE)
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