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Searched refs:FPU (Results 1 – 25 of 225) sorted by relevance

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/external/llvm-project/clang/lib/Basic/Targets/
DAArch64.cpp256 if (FPU & NeonMode) { in getTargetDefines()
262 if (FPU & SveMode) in getTargetDefines()
289 if ((FPU & NeonMode) && HasFullFP16) in getTargetDefines()
316 if ((FPU & SveMode) && HasBFloat16) { in getTargetDefines()
320 if ((FPU & SveMode) && HasMatmulFP64) in getTargetDefines()
323 if ((FPU & SveMode) && HasMatmulFP32) in getTargetDefines()
326 if ((FPU & SveMode) && HasMatMul) in getTargetDefines()
329 if ((FPU & NeonMode) && HasFP16FML) in getTargetDefines()
395 (Feature == "neon" && (FPU & NeonMode)) || in hasFeature()
400 (FPU & SveMode)); in hasFeature()
[all …]
DARM.cpp423 FPU = 0; in handleTargetFeatures()
444 FPU |= VFP2FPU; in handleTargetFeatures()
450 FPU |= VFP3FPU; in handleTargetFeatures()
456 FPU |= VFP4FPU; in handleTargetFeatures()
462 FPU |= FPARMV8; in handleTargetFeatures()
467 FPU |= NeonFPU; in handleTargetFeatures()
498 FPU |= FPARMV8; in handleTargetFeatures()
531 if (!(FPU & NeonFPU) && FPMath == FP_Neon) { in handleTargetFeatures()
550 .Case("neon", (FPU & NeonFPU) && !SoftFloat) in hasFeature()
551 .Case("vfp", FPU && !SoftFloat) in hasFeature()
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/external/llvm-project/lldb/source/Plugins/Process/Utility/
DRegisterInfoPOSIX_arm.cpp25 (LLVM_EXTENSION offsetof(RegisterInfoPOSIX_arm::FPU, fpscr) + \
29 sizeof(RegisterInfoPOSIX_arm::FPU))
32 sizeof(RegisterInfoPOSIX_arm::GPR) + sizeof(RegisterInfoPOSIX_arm::FPU) + \
43 (sizeof(RegisterInfoPOSIX_arm::GPR) + sizeof(RegisterInfoPOSIX_arm::FPU) + \
163 return sizeof(struct RegisterInfoPOSIX_arm::FPU); in GetFPRSize()
DRegisterContextDarwin_i386.h75 struct FPU { struct
107 FPUWordCount = sizeof(FPU) / sizeof(uint32_t), argument
114 FPU fpu;
185 virtual int DoReadFPU(lldb::tid_t tid, int flavor, FPU &fpu) = 0;
191 virtual int DoWriteFPU(lldb::tid_t tid, int flavor, const FPU &fpu) = 0;
DRegisterContextDarwin_arm64.h80 struct FPU { struct
114 FPUWordCount = sizeof(FPU) / sizeof(uint32_t), // ARM_NEON_STATE64_COUNT
123 FPU fpu;
204 virtual int DoReadFPU(lldb::tid_t tid, int flavor, FPU &fpu) = 0;
212 virtual int DoWriteFPU(lldb::tid_t tid, int flavor, const FPU &fpu) = 0;
DRegisterContextDarwin_x86_64.h80 struct FPU { struct
112 FPUWordCount = sizeof(FPU) / sizeof(uint32_t), argument
119 FPU fpu;
190 virtual int DoReadFPU(lldb::tid_t tid, int flavor, FPU &fpu) = 0;
196 virtual int DoWriteFPU(lldb::tid_t tid, int flavor, const FPU &fpu) = 0;
DRegisterContextMach_i386.cpp29 int RegisterContextMach_i386::DoReadFPU(lldb::tid_t tid, int flavor, FPU &fpu) { in DoReadFPU()
47 const FPU &fpu) { in DoWriteFPU()
49 tid, flavor, reinterpret_cast<thread_state_t>(const_cast<FPU *>(&fpu)), in DoWriteFPU()
DRegisterContextMach_x86_64.cpp31 FPU &fpu) { in DoReadFPU()
50 const FPU &fpu) { in DoWriteFPU()
52 tid, flavor, reinterpret_cast<thread_state_t>(const_cast<FPU *>(&fpu)), in DoWriteFPU()
DRegisterContextDarwin_arm.h98 struct FPU { struct
148 FPUWordCount = sizeof(FPU) / sizeof(uint32_t),
156 FPU fpu;
237 virtual int DoReadFPU(lldb::tid_t tid, int flavor, FPU &fpu) = 0;
245 virtual int DoWriteFPU(lldb::tid_t tid, int flavor, const FPU &fpu) = 0;
DRegisterContextMach_arm.cpp31 int RegisterContextMach_arm::DoReadFPU(lldb::tid_t tid, int flavor, FPU &fpu) { in DoReadFPU()
54 const FPU &fpu) { in DoWriteFPU()
56 tid, flavor, reinterpret_cast<thread_state_t>(const_cast<FPU *>(&fpu)), in DoWriteFPU()
DRegisterContextMach_i386.h24 int DoReadFPU(lldb::tid_t tid, int flavor, FPU &fpu) override;
30 int DoWriteFPU(lldb::tid_t tid, int flavor, const FPU &fpu) override;
DRegisterContextMach_x86_64.h25 int DoReadFPU(lldb::tid_t tid, int flavor, FPU &fpu) override;
31 int DoWriteFPU(lldb::tid_t tid, int flavor, const FPU &fpu) override;
DRegisterContextMach_arm.h24 int DoReadFPU(lldb::tid_t tid, int flavor, FPU &fpu) override;
32 int DoWriteFPU(lldb::tid_t tid, int flavor, const FPU &fpu) override;
/external/llvm/test/MC/Mips/
Dupdate-module-level-options.s6 # CHECK: :[[@LINE-1]]:9: error: -mno-odd-spreg prohibits the use of odd FPU registers
10 # CHECK-NOT: :[[@LINE-1]]:{{[0-9]+}}: error: -mno-odd-spreg prohibits the use of odd FPU registers
14 # CHECK: :[[@LINE-1]]:9: error: -mno-odd-spreg prohibits the use of odd FPU registers
Dset-oddspreg-nooddspreg-error.s6 # CHECK-NOT: :[[@LINE-1]]:{{[0-9]+}}: error: -mno-odd-spreg prohibits the use of odd FPU registers
10 # CHECK: :[[@LINE-1]]:9: error: -mno-odd-spreg prohibits the use of odd FPU registers
/external/llvm-project/llvm/test/MC/Mips/
Dupdate-module-level-options.s6 # CHECK: :[[@LINE-1]]:9: error: -mno-odd-spreg prohibits the use of odd FPU registers
10 # CHECK-NOT: :[[@LINE-1]]:{{[0-9]+}}: error: -mno-odd-spreg prohibits the use of odd FPU registers
14 # CHECK: :[[@LINE-1]]:9: error: -mno-odd-spreg prohibits the use of odd FPU registers
Dset-oddspreg-nooddspreg-error.s6 # CHECK-NOT: :[[@LINE-1]]:{{[0-9]+}}: error: -mno-odd-spreg prohibits the use of odd FPU registers
10 # CHECK: :[[@LINE-1]]:9: error: -mno-odd-spreg prohibits the use of odd FPU registers
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/SystemZ/
DSystemZScheduleZEC12.td84 def : WriteRes<FPU, [ZEC12_FPUnit]>;
89 def : WriteRes<!cast<SchedWrite>("FPU"#Num), [ZEC12_FPUnit]>;
756 def : InstRW<[WLat9, WLat9, FPU, NormalGr], (instregex "LT(E|D)BR$")>;
757 def : InstRW<[WLat9, FPU, NormalGr], (instregex "LT(E|D)BRCompare$")>;
782 def : InstRW<[WLat7, FPU, NormalGr], (instregex "LEDBR(A)?$")>;
786 def : InstRW<[WLat7LSU, FPU, LSU, NormalGr], (instregex "LDEB$")>;
787 def : InstRW<[WLat7, FPU, NormalGr], (instregex "LDEBR$")>;
792 def : InstRW<[WLat8, FXU, FPU, GroupAlone], (instregex "C(E|D)(F|G)BR(A)?$")>;
794 def : InstRW<[WLat8, FXU, FPU, GroupAlone], (instregex "CEL(F|G)BR$")>;
795 def : InstRW<[WLat8, FXU, FPU, GroupAlone], (instregex "CDL(F|G)BR$")>;
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DSystemZScheduleZ196.td83 def : WriteRes<FPU, [Z196_FPUnit]>;
88 def : WriteRes<!cast<SchedWrite>("FPU"#Num), [Z196_FPUnit]>;
718 def : InstRW<[WLat9, WLat9, FPU, NormalGr], (instregex "LT(E|D)BR$")>;
719 def : InstRW<[WLat9, FPU, NormalGr], (instregex "LT(E|D)BRCompare$")>;
744 def : InstRW<[WLat7, FPU, NormalGr], (instregex "LEDBR(A)?$")>;
748 def : InstRW<[WLat7LSU, FPU, LSU, NormalGr], (instregex "LDEB$")>;
749 def : InstRW<[WLat7, FPU, NormalGr], (instregex "LDEBR$")>;
754 def : InstRW<[WLat8, FXU, FPU, GroupAlone], (instregex "C(E|D)(F|G)BR(A)?$")>;
756 def : InstRW<[WLat8, FXU, FPU, GroupAlone], (instregex "CEL(F|G)BR$")>;
757 def : InstRW<[WLat8, FXU, FPU, GroupAlone], (instregex "CDL(F|G)BR$")>;
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/external/llvm-project/llvm/lib/Target/SystemZ/
DSystemZScheduleZ196.td83 def : WriteRes<FPU, [Z196_FPUnit]>;
88 def : WriteRes<!cast<SchedWrite>("FPU"#Num), [Z196_FPUnit]>;
718 def : InstRW<[WLat9, WLat9, FPU, NormalGr], (instregex "LT(E|D)BR$")>;
719 def : InstRW<[WLat9, FPU, NormalGr], (instregex "LT(E|D)BRCompare$")>;
744 def : InstRW<[WLat7, FPU, NormalGr], (instregex "LEDBR(A)?$")>;
748 def : InstRW<[WLat7LSU, FPU, LSU, NormalGr], (instregex "LDEB$")>;
749 def : InstRW<[WLat7, FPU, NormalGr], (instregex "LDEBR$")>;
754 def : InstRW<[WLat8, FXU, FPU, GroupAlone], (instregex "C(E|D)(F|G)BR(A)?$")>;
756 def : InstRW<[WLat8, FXU, FPU, GroupAlone], (instregex "CEL(F|G)BR$")>;
757 def : InstRW<[WLat8, FXU, FPU, GroupAlone], (instregex "CDL(F|G)BR$")>;
[all …]
DSystemZScheduleZEC12.td84 def : WriteRes<FPU, [ZEC12_FPUnit]>;
89 def : WriteRes<!cast<SchedWrite>("FPU"#Num), [ZEC12_FPUnit]>;
756 def : InstRW<[WLat9, WLat9, FPU, NormalGr], (instregex "LT(E|D)BR$")>;
757 def : InstRW<[WLat9, FPU, NormalGr], (instregex "LT(E|D)BRCompare$")>;
782 def : InstRW<[WLat7, FPU, NormalGr], (instregex "LEDBR(A)?$")>;
786 def : InstRW<[WLat7LSU, FPU, LSU, NormalGr], (instregex "LDEB$")>;
787 def : InstRW<[WLat7, FPU, NormalGr], (instregex "LDEBR$")>;
792 def : InstRW<[WLat8, FXU, FPU, GroupAlone], (instregex "C(E|D)(F|G)BR(A)?$")>;
794 def : InstRW<[WLat8, FXU, FPU, GroupAlone], (instregex "CEL(F|G)BR$")>;
795 def : InstRW<[WLat8, FXU, FPU, GroupAlone], (instregex "CDL(F|G)BR$")>;
[all …]
/external/elfutils/tests/
Drun-addrcfi.sh68 FPU-control reg37 (%fctrl): undefined
69 FPU-control reg38 (%fstat): undefined
70 FPU-control reg39 (%mxcsr): undefined
115 FPU-control reg37 (%fctrl): undefined
116 FPU-control reg38 (%fstat): undefined
117 FPU-control reg39 (%mxcsr): undefined
334 FPU reg32 (f0): undefined
335 FPU reg33 (f1): undefined
336 FPU reg34 (f2): undefined
337 FPU reg35 (f3): undefined
[all …]
/external/llvm-project/lldb/source/Plugins/Process/MacOSX-Kernel/
DRegisterContextKDP_x86_64.h25 int DoReadFPU(lldb::tid_t tid, int flavor, FPU &fpu) override;
31 int DoWriteFPU(lldb::tid_t tid, int flavor, const FPU &fpu) override;
DRegisterContextKDP_i386.h25 int DoReadFPU(lldb::tid_t tid, int flavor, FPU &fpu) override;
31 int DoWriteFPU(lldb::tid_t tid, int flavor, const FPU &fpu) override;
DRegisterContextKDP_arm.h25 int DoReadFPU(lldb::tid_t tid, int flavor, FPU &fpu) override;
33 int DoWriteFPU(lldb::tid_t tid, int flavor, const FPU &fpu) override;

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