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Searched refs:FROUNDEVEN (Results 1 – 14 of 14) sorted by relevance

/external/llvm-project/llvm/include/llvm/IR/
DConstrainedOps.def94 DAG_FUNCTION(roundeven, 1, 0, experimental_constrained_roundeven, FROUNDEVEN)
/external/llvm-project/llvm/include/llvm/CodeGen/
DISDOpcodes.h811 FROUNDEVEN, enumerator
DBasicTTIImpl.h1478 ISDs.push_back(ISD::FROUNDEVEN); in getTypeBasedIntrinsicInstrCost()
/external/llvm-project/llvm/lib/CodeGen/SelectionDAG/
DSelectionDAGDumper.cpp215 case ISD::FROUNDEVEN: return "froundeven"; in getOperationName()
DLegalizeFloatTypes.cpp117 case ISD::FROUNDEVEN: R = SoftenFloatRes_FROUNDEVEN(N); break; in SoftenFloatResult()
1213 case ISD::FROUNDEVEN: ExpandFloatRes_FROUNDEVEN(N, Lo, Hi); break; in ExpandFloatResult()
2226 case ISD::FROUNDEVEN: in PromoteFloatResult()
2591 case ISD::FROUNDEVEN: in SoftPromoteHalfResult()
DLegalizeVectorOps.cpp430 case ISD::FROUNDEVEN: in LegalizeOp()
DLegalizeVectorTypes.cpp98 case ISD::FROUNDEVEN: in ScalarizeVectorResult()
950 case ISD::FROUNDEVEN: in SplitVectorResult()
2974 case ISD::FROUNDEVEN: in WidenVectorResult()
DLegalizeDAG.cpp4211 case ISD::FROUNDEVEN: in ConvertNodeToLibcall()
4731 case ISD::FROUNDEVEN: in PromoteNode()
DSelectionDAG.cpp4072 case ISD::FROUNDEVEN: in isKnownNeverNaN()
DSelectionDAGBuilder.cpp6080 case Intrinsic::roundeven: Opcode = ISD::FROUNDEVEN; break; in visitIntrinsicCall()
/external/llvm-project/llvm/lib/CodeGen/
DTargetLoweringBase.cpp808 setOperationAction(ISD::FROUNDEVEN, VT, Expand); in initActions()
876 setOperationAction(ISD::FROUNDEVEN, VT, Expand); in initActions()
/external/llvm-project/llvm/lib/Target/X86/
DX86ISelDAGToDAG.cpp1070 case ISD::FROUNDEVEN: in PreprocessISelDAG()
1088 case ISD::FROUNDEVEN: Imm = 0x8; break; in PreprocessISelDAG()
DX86ISelLowering.cpp1090 setOperationAction(ISD::FROUNDEVEN, RoundedTy, Legal); in X86TargetLowering()
1192 setOperationAction(ISD::FROUNDEVEN, VT, Legal); in X86TargetLowering()
1583 setOperationAction(ISD::FROUNDEVEN, VT, Legal); in X86TargetLowering()
/external/llvm-project/llvm/lib/Target/AArch64/
DAArch64ISelLowering.cpp1143 setOperationAction(ISD::FROUNDEVEN, VT, Custom); in AArch64TargetLowering()
4185 case ISD::FROUNDEVEN: in LowerOperation()