| /external/llvm/lib/Target/X86/ |
| D | X86ISelLowering.h | 253 FRSQRTS, FRCPS, enumerator
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| D | X86IntrinsicsInfo.h | 1814 X86_INTRINSIC_DATA(avx512_rsqrt14_sd, INTR_TYPE_SCALAR_MASK, X86ISD::FRSQRTS, 0),
1815 X86_INTRINSIC_DATA(avx512_rsqrt14_ss, INTR_TYPE_SCALAR_MASK, X86ISD::FRSQRTS, 0),
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| D | X86InstrFragmentsSIMD.td | 63 def X86frsqrt14s: SDNode<"X86ISD::FRSQRTS", SDTFPBinOp>;
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| D | X86ISelLowering.cpp | 22144 case X86ISD::FRSQRTS: return "X86ISD::FRSQRTS"; in getTargetNodeName()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.h | 200 FRSQRTE, FRSQRTS, enumerator
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| D | AArch64InstrInfo.td | 529 def AArch64frsqrts : SDNode<"AArch64ISD::FRSQRTS", SDTFPBinOp>;
3886 defm FRSQRTS : SIMDThreeSameVectorFP<0,1,0b111,"frsqrts", int_aarch64_neon_frsqrts>;
4178 defm FRSQRTS : SIMDFPThreeScalar<0, 1, 0b111, "frsqrts", int_aarch64_neon_frsqrts>;
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| D | AArch64ISelLowering.cpp | 1374 case AArch64ISD::FRSQRTS: return "AArch64ISD::FRSQRTS"; in getTargetNodeName()
6076 Step = DAG.getNode(AArch64ISD::FRSQRTS, DL, VT, Operand, Step, Flags); in getSqrtEstimate()
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| /external/llvm-project/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.h | 282 FRSQRTS, enumerator
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| D | AArch64InstrInfo.td | 544 def AArch64frsqrts : SDNode<"AArch64ISD::FRSQRTS", SDTFPBinOp>;
4061 defm FRSQRTS : SIMDThreeSameVectorFP<0,1,0b111,"frsqrts", int_aarch64_neon_frsqrts>;
4356 defm FRSQRTS : SIMDFPThreeScalar<0, 1, 0b111, "frsqrts", int_aarch64_neon_frsqrts>;
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| D | AArch64ISelLowering.cpp | 1865 MAKE_CASE(AArch64ISD::FRSQRTS) in getTargetNodeName()
7352 Step = DAG.getNode(AArch64ISD::FRSQRTS, DL, VT, Operand, Step, Flags); in getSqrtEstimate()
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| /external/clang/include/clang/Basic/ |
| D | arm_neon.td | 955 def FRSQRTS : IInst<"vrsqrts", "ddd", "dQd">;
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| /external/llvm-project/clang/include/clang/Basic/ |
| D | arm_neon.td | 818 def FRSQRTS : IInst<"vrsqrts", "...", "dQd">;
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| /external/vixl/src/aarch64/ |
| D | disasm-aarch64.cc | 2938 FORMAT(FRSQRTS, "frsqrts"); in VisitNEON3SameFP16()
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| D | simulator-aarch64.cc | 5353 SIM_FUNC(FRSQRTS, frsqrts); in VisitNEON3SameFP16()
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64InstrInfo.td | 2982 defm FRSQRTS : SIMDThreeSameVectorFP<0,1,0b111,"frsqrts", int_aarch64_neon_frsqrts>;
3262 defm FRSQRTS : SIMDFPThreeScalar<0, 1, 0b111, "frsqrts", int_aarch64_neon_frsqrts>;
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| /external/vixl/doc/aarch64/ |
| D | supported-instructions-aarch64.md | 4270 ### FRSQRTS ### subsection
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| /external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/AArch64/ |
| D | AArch64GenFastISel.inc | 5542 // FastEmit functions for AArch64ISD::FRSQRTS.
9795 …case AArch64ISD::FRSQRTS: return fastEmit_AArch64ISD_FRSQRTS_rr(VT, RetVT, Op0, Op0IsKill, Op1, Op…
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