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Searched refs:FXOR (Results 1 – 18 of 18) sorted by relevance

/external/llvm/lib/Target/X86/
DX86IntrinsicsInfo.h1623 X86_INTRINSIC_DATA(avx512_mask_xor_pd_128, INTR_TYPE_2OP_MASK, X86ISD::FXOR, 0),
1624 X86_INTRINSIC_DATA(avx512_mask_xor_pd_256, INTR_TYPE_2OP_MASK, X86ISD::FXOR, 0),
1625 X86_INTRINSIC_DATA(avx512_mask_xor_pd_512, INTR_TYPE_2OP_MASK, X86ISD::FXOR, 0),
1626 X86_INTRINSIC_DATA(avx512_mask_xor_ps_128, INTR_TYPE_2OP_MASK, X86ISD::FXOR, 0),
1627 X86_INTRINSIC_DATA(avx512_mask_xor_ps_256, INTR_TYPE_2OP_MASK, X86ISD::FXOR, 0),
1628 X86_INTRINSIC_DATA(avx512_mask_xor_ps_512, INTR_TYPE_2OP_MASK, X86ISD::FXOR, 0),
DX86ISelLowering.h53 FXOR, enumerator
DX86InstrFragmentsSIMD.td57 def X86fxor : SDNode<"X86ISD::FXOR", SDTFPBinOp,
DX86ISelLowering.cpp14362 IsFABS ? X86ISD::FAND : IsFNABS ? X86ISD::FOR : X86ISD::FXOR; in LowerFABSorFNEG()
22085 case X86ISD::FXOR: return "X86ISD::FXOR"; in getTargetNodeName()
26278 case ISD::XOR: FPOpcode = X86ISD::FXOR; break; in combineBitcast()
28176 FPOpcode = X86ISD::FXOR; in convertIntLogicToFPLogic()
29792 case X86ISD::FXOR: IntOpcode = ISD::XOR; break; in lowerX86FPLogicOp()
29804 assert(N->getOpcode() == X86ISD::FOR || N->getOpcode() == X86ISD::FXOR); in combineFOr()
30976 case X86ISD::FXOR: in PerformDAGCombine()
/external/llvm/lib/Target/Sparc/
DSparcInstrVIS.td106 def FXOR : VISInst<0b001101100, "fxor">;
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Sparc/
DSparcInstrVIS.td105 def FXOR : VISInst<0b001101100, "fxor">;
/external/llvm-project/llvm/lib/Target/Sparc/
DSparcInstrVIS.td105 def FXOR : VISInst<0b001101100, "fxor">;
/external/llvm-project/llvm/lib/Target/X86/
DX86ISelLowering.h51 FXOR, enumerator
DX86InstrFragmentsSIMD.td53 def X86fxor : SDNode<"X86ISD::FXOR", SDTFPBinOp,
DX86ISelDAGToDAG.cpp1115 case X86ISD::FXOR: { in PreprocessISelDAG()
1140 case X86ISD::FXOR: Opc = ISD::XOR; break; in PreprocessISelDAG()
DX86ISelLowering.cpp21607 X86ISD::FXOR; in LowerFABSorFNEG()
30751 NODE_NAME_CASE(FXOR) in getTargetNodeName()
31223 case X86ISD::FXOR: in isCommutativeBinOp()
38694 case ISD::XOR: return X86ISD::FXOR; in getAltBitOpcode()
39355 case ISD::XOR: FPOpcode = X86ISD::FXOR; break; in combineBitcast()
43262 case ISD::XOR: FPOpcode = X86ISD::FXOR; break; in convertIntLogicToFPLogicOpcode()
45878 case X86ISD::FXOR: { in isFNEG()
46086 case X86ISD::FXOR: IntOpcode = ISD::XOR; break; in lowerX86FPLogicOp()
46117 MVT::v4i32, DAG.getNode(X86ISD::FXOR, SDLoc(N), MVT::v4f32, in combineXor()
46202 if (N0.getOpcode() == X86ISD::FXOR && isAllOnesConstantFP(N0.getOperand(1))) in combineFAndFNotToFAndn()
[all …]
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
DX86ISelLowering.h51 FXOR, enumerator
DX86InstrFragmentsSIMD.td53 def X86fxor : SDNode<"X86ISD::FXOR", SDTFPBinOp,
DX86ISelDAGToDAG.cpp945 case X86ISD::FXOR: { in PreprocessISelDAG()
970 case X86ISD::FXOR: Opc = ISD::XOR; break; in PreprocessISelDAG()
DX86ISelLowering.cpp20464 X86ISD::FXOR; in LowerFABSorFNEG()
29607 case X86ISD::FXOR: return "X86ISD::FXOR"; in getTargetNodeName()
30064 case X86ISD::FXOR: in isCommutativeBinOp()
36665 case ISD::XOR: FPOpcode = X86ISD::FXOR; break; in combineBitcast()
39966 case ISD::XOR: FPOpcode = X86ISD::FXOR; break; in convertIntLogicToFPLogic()
42482 case X86ISD::FXOR: { in isFNEG()
42728 case X86ISD::FXOR: IntOpcode = ISD::XOR; break; in lowerX86FPLogicOp()
42759 MVT::v4i32, DAG.getNode(X86ISD::FXOR, SDLoc(N), MVT::v4f32, in combineXor()
42853 if (N0.getOpcode() == X86ISD::FXOR && isAllOnesConstantFP(N0.getOperand(1))) in combineFAndFNotToFAndn()
42857 if (N1.getOpcode() == X86ISD::FXOR && isAllOnesConstantFP(N1.getOperand(1))) in combineFAndFNotToFAndn()
[all …]
/external/capstone/arch/Sparc/
DSparcGenDisassemblerTables.inc1127 /* 4502 */ MCD_OPC_Decode, 165, 2, 27, // Opcode: FXOR
DSparcGenAsmWriter.inc314 5526U, // FXOR
/external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/X86/
DX86GenFastISel.inc12157 // FastEmit functions for X86ISD::FXOR.
15176 case X86ISD::FXOR: return fastEmit_X86ISD_FXOR_rr(VT, RetVT, Op0, Op0IsKill, Op1, Op1IsKill);