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Searched refs:Family (Results 1 – 25 of 83) sorted by relevance

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/external/llvm-project/compiler-rt/lib/builtins/
Dcpu_model.c277 static void detectX86FamilyModel(unsigned EAX, unsigned *Family, in detectX86FamilyModel() argument
279 *Family = (EAX >> 8) & 0xf; // Bits 8 - 11 in detectX86FamilyModel()
281 if (*Family == 6 || *Family == 0xf) { in detectX86FamilyModel()
282 if (*Family == 0xf) in detectX86FamilyModel()
284 *Family += (EAX >> 20) & 0xff; // Bits 20 - 27 in detectX86FamilyModel()
291 getIntelProcessorTypeAndSubtype(unsigned Family, unsigned Model, in getIntelProcessorTypeAndSubtype() argument
301 switch (Family) { in getIntelProcessorTypeAndSubtype()
488 getAMDProcessorTypeAndSubtype(unsigned Family, unsigned Model, in getAMDProcessorTypeAndSubtype() argument
495 switch (Family) { in getAMDProcessorTypeAndSubtype()
719 unsigned Model, Family; in __cpu_indicator_init() local
[all …]
/external/llvm-project/clang/lib/StaticAnalyzer/Checkers/
DMallocChecker.cpp114 static void printExpectedAllocName(raw_ostream &os, AllocationFamily Family);
118 static void printExpectedDeallocName(raw_ostream &os, AllocationFamily Family);
146 AllocationFamily Family; member in __anon59cbc8120211::RefState
149 : S(s), K(k), Family(family) { in RefState()
159 AllocationFamily getAllocationFamily() const { return Family; } in getAllocationFamily()
163 return K == X.K && S == X.S && Family == X.Family; in operator ==()
186 ID.AddInteger(Family); in Profile()
215 AllocationFamily Family,
445 AllocationFamily Family) const;
495 AllocationFamily Family);
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/external/llvm/lib/Support/
DHost.cpp285 static void detectX86FamilyModel(unsigned EAX, unsigned *Family, in detectX86FamilyModel() argument
287 *Family = (EAX >> 8) & 0xf; // Bits 8 - 11 in detectX86FamilyModel()
289 if (*Family == 6 || *Family == 0xf) { in detectX86FamilyModel()
290 if (*Family == 0xf) in detectX86FamilyModel()
292 *Family += (EAX >> 20) & 0xff; // Bits 20 - 27 in detectX86FamilyModel()
299 getIntelProcessorTypeAndSubtype(unsigned int Family, unsigned int Model, in getIntelProcessorTypeAndSubtype() argument
304 switch (Family) { in getIntelProcessorTypeAndSubtype()
585 static void getAMDProcessorTypeAndSubtype(unsigned int Family, in getAMDProcessorTypeAndSubtype() argument
593 switch (Family) { in getAMDProcessorTypeAndSubtype()
752 unsigned Family = 0, Model = 0; in getHostCPUName() local
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/external/clang/lib/StaticAnalyzer/Checkers/
DMallocChecker.cpp69 unsigned Family : 29; // Rest of 32-bit word, currently just an allocation member in __anond5670e240111::RefState
73 : S(s), K(k), Family(family) { in RefState()
83 return (AllocationFamily)Family; in getAllocationFamily()
88 return K == X.K && S == X.S && Family == X.Family; in operator ==()
111 ID.AddInteger(Family); in Profile()
260 void printExpectedDeallocName(raw_ostream &os, AllocationFamily Family) const;
268 AllocationFamily Family,
285 AllocationFamily Family = AF_Malloc);
289 AllocationFamily Family = AF_Malloc);
300 AllocationFamily Family = AF_Malloc);
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AVR/
DAVRDevices.td20 class Family<string name, list<SubtargetFeature> i>
153 def FamilyAVR0 : Family<"avr0", []>;
155 def FamilyAVR1 : Family<"avr1", [FamilyAVR0, FeatureLPM]>;
157 def FamilyAVR2 : Family<"avr2",
161 def FamilyAVR25 : Family<"avr25",
165 def FamilyAVR3 : Family<"avr3",
168 def FamilyAVR31 : Family<"avr31",
171 def FamilyAVR35 : Family<"avr35",
175 def FamilyAVR4 : Family<"avr4",
180 def FamilyAVR5 : Family<"avr5",
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/external/llvm-project/llvm/lib/Target/AVR/
DAVRDevices.td20 class Family<string name, list<SubtargetFeature> i>
158 def FamilyAVR0 : Family<"avr0", []>;
160 def FamilyAVR1 : Family<"avr1", [FamilyAVR0, FeatureLPM, FeatureMMR]>;
162 def FamilyAVR2 : Family<"avr2",
166 def FamilyAVR25 : Family<"avr25",
170 def FamilyAVR3 : Family<"avr3",
173 def FamilyAVR31 : Family<"avr31",
176 def FamilyAVR35 : Family<"avr35",
180 def FamilyAVR4 : Family<"avr4",
185 def FamilyAVR5 : Family<"avr5",
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/external/llvm/lib/Target/AVR/
DAVR.td38 class Family<string name, list<SubtargetFeature> i>
171 def FamilyAVR0 : Family<"avr0", []>;
173 def FamilyAVR1 : Family<"avr1", [FamilyAVR0, FeatureLPM]>;
175 def FamilyAVR2 : Family<"avr2",
179 def FamilyAVR25 : Family<"avr25",
183 def FamilyAVR3 : Family<"avr3",
186 def FamilyAVR31 : Family<"avr31",
189 def FamilyAVR35 : Family<"avr35",
193 def FamilyAVR4 : Family<"avr4",
198 def FamilyAVR5 : Family<"avr5",
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/external/llvm-project/llvm/lib/Support/
DHost.cpp574 static void detectX86FamilyModel(unsigned EAX, unsigned *Family, in detectX86FamilyModel() argument
576 *Family = (EAX >> 8) & 0xf; // Bits 8 - 11 in detectX86FamilyModel()
578 if (*Family == 6 || *Family == 0xf) { in detectX86FamilyModel()
579 if (*Family == 0xf) in detectX86FamilyModel()
581 *Family += (EAX >> 20) & 0xff; // Bits 20 - 27 in detectX86FamilyModel()
588 getIntelProcessorTypeAndSubtype(unsigned Family, unsigned Model, in getIntelProcessorTypeAndSubtype() argument
597 switch (Family) { in getIntelProcessorTypeAndSubtype()
862 getAMDProcessorTypeAndSubtype(unsigned Family, unsigned Model, in getAMDProcessorTypeAndSubtype() argument
871 switch (Family) { in getAMDProcessorTypeAndSubtype()
1124 unsigned Family = 0, Model = 0; in getHostCPUName() local
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Support/
DHost.cpp542 static void detectX86FamilyModel(unsigned EAX, unsigned *Family, in detectX86FamilyModel() argument
544 *Family = (EAX >> 8) & 0xf; // Bits 8 - 11 in detectX86FamilyModel()
546 if (*Family == 6 || *Family == 0xf) { in detectX86FamilyModel()
547 if (*Family == 0xf) in detectX86FamilyModel()
549 *Family += (EAX >> 20) & 0xff; // Bits 20 - 27 in detectX86FamilyModel()
556 getIntelProcessorTypeAndSubtype(unsigned Family, unsigned Model, in getIntelProcessorTypeAndSubtype() argument
562 switch (Family) { in getIntelProcessorTypeAndSubtype()
881 static void getAMDProcessorTypeAndSubtype(unsigned Family, unsigned Model, in getAMDProcessorTypeAndSubtype() argument
887 switch (Family) { in getAMDProcessorTypeAndSubtype()
1142 unsigned Family = 0, Model = 0; in getHostCPUName() local
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/external/protobuf/src/google/protobuf/compiler/cpp/
Dcpp_padding_optimizer.cc124 enum Family { in OptimizeLayout() enum
143 Family f = OTHER; in OptimizeLayout()
/external/libnl/
Dlibnl-xfrm-3.0.pc.in7 Description: Netlink Routing Family Library
Dlibnl-route-3.0.pc.in7 Description: Netlink Routing Family Library
Dlibnl-idiag-3.0.pc.in7 Description: Netlink Inet Diag Family Library
/external/llvm-project/clang/lib/Driver/ToolChains/
DAVR.cpp34 StringRef Family; member
288 return Optional<StringRef>(MCU.Family); in GetMCUFamilyName()
/external/wpa_supplicant_8/wpa_supplicant/
Deap_proxy_qmi_oc.mak10 # This is supported only in B Family devices.
/external/libnl/doc/
Dindex.txt11 link:route.html[Routing Family Library] (libnl-route)::
/external/libxml2/result/HTML/
Dtest3.html.sax118 SAX.startElement(a, href='ProblemDomain.Family.html#ProblemDomain.Family')
119 SAX.characters(ProblemDomain.Family, 20)
/external/skqp/src/gpu/mtl/
DGrMtlCaps.mm58 // iOS Family group 3
73 // iOS Family group 2
93 // iOS Family group 1
208 // Family group 1 and 2 support 8192 for version 2 and above, 4096 for v1
/external/pdfium/core/fpdfapi/page/
Dcpdf_colorspace.h66 static RetainPtr<CPDF_ColorSpace> GetStockCS(int Family);
/external/llvm-project/clang/
DREADME.txt2 // C Language Family Front-end
/external/clang/
DREADME.txt2 // C Language Family Front-end
/external/llvm/test/CodeGen/X86/
Dfold-vex.ll14 ; unless specially configured on some CPUs such as AMD Family 10H.
/external/llvm-project/llvm/test/CodeGen/X86/
Dfold-vex.ll15 ; unless specially configured on some CPUs such as AMD Family 10H.
/external/mesa3d/src/gallium/drivers/swr/rasterizer/common/
Dsimdlib_128_avx512_knights.inl28 // SIMD128 AVX (512) implementation for Knights Family
Dsimdlib_256_avx512_knights.inl28 // SIMD256 AVX (512) implementation for Knights Family

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