Searched refs:GEN5 (Results 1 – 3 of 3) sorted by relevance
| /external/mesa3d/src/intel/compiler/ |
| D | brw_gen_enum.h | 30 GEN5 = (1 << 2), enumerator
51 case 5: return GEN5; in gen_from_devinfo()
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| D | brw_eu.cpp | 641 { BRW_OPCODE_IFF, 35, "iff", 0, 0, GEN_LE(GEN5) },
645 { BRW_OPCODE_DO, 38, "do", 0, 0, GEN_LE(GEN5) },
652 { BRW_OPCODE_MSAVE, 44, "msave", 0, 0, GEN_LE(GEN5) },
654 { BRW_OPCODE_MREST, 45, "mrest", 0, 0, GEN_LE(GEN5) },
656 { BRW_OPCODE_PUSH, 46, "push", 0, 0, GEN_LE(GEN5) },
659 { BRW_OPCODE_POP, 47, "pop", 2, 0, GEN_LE(GEN5) },
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| /external/igt-gpu-tools/tests/i915/ |
| D | gem_ctx_isolation.c | 51 #define GEN5 (ALL << 5) macro
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