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Searched refs:GEN7_CACHE_MODE_1 (Results 1 – 3 of 3) sorted by relevance

/external/mesa3d/src/mesa/drivers/dri/i965/
Dgen8_depth_state.c156 brw_load_register_imm32(brw, GEN7_CACHE_MODE_1, in gen8_write_pma_stall_bits()
Dbrw_state_upload.c207 brw_load_register_imm32(brw, GEN7_CACHE_MODE_1, in brw_upload_initial_gpu_state()
Dbrw_defines.h1562 #define GEN7_CACHE_MODE_1 0x7004 macro