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Searched refs:GEN8_DATAPORT_DC_PORT1_A64_SCATTERED_WRITE (Results 1 – 4 of 4) sorted by relevance

/external/mesa3d/src/intel/compiler/
Dbrw_eu_defines.h1423 #define GEN8_DATAPORT_DC_PORT1_A64_SCATTERED_WRITE 0x1a macro
Dbrw_eu.h877 write ? GEN8_DATAPORT_DC_PORT1_A64_SCATTERED_WRITE : in brw_dp_a64_byte_scattered_rw_desc()
Dbrw_schedule_instructions.cpp503 case GEN8_DATAPORT_DC_PORT1_A64_SCATTERED_WRITE: in set_latency_gen7()
Dbrw_disasm.c449 [GEN8_DATAPORT_DC_PORT1_A64_SCATTERED_WRITE] = "DC A64 scattered write",