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Searched refs:GICR_IGRPMODR0 (Results 1 – 4 of 4) sorted by relevance

/external/arm-trusted-firmware/plat/mediatek/mt8192/
Dplat_mt_gic.c87 mmio_write_32(gicr_base + GICR_IGRPMODR0, 0x0); in mt_gic_rdistif_init()
107 gic_data.saved_grpmod = mmio_read_32(gicr_base + GICR_IGRPMODR0); in mt_gic_rdistif_save()
125 mmio_write_32(gicr_base + GICR_IGRPMODR0, in mt_gic_rdistif_restore()
142 mmio_write_32(gicr_base + GICR_IGRPMODR0, in mt_gic_rdistif_restore_all()
/external/arm-trusted-firmware/plat/mediatek/mt8183/
Dplat_mt_gic.c92 mmio_write_32(gicr_base + GICR_IGRPMODR0, 0x0); in mt_gic_rdistif_init()
122 gic_data.saved_grpmod = mmio_read_32(gicr_base + GICR_IGRPMODR0); in mt_gic_rdistif_save()
139 mmio_write_32(gicr_base + GICR_IGRPMODR0, gic_data.saved_grpmod); in mt_gic_rdistif_restore()
/external/arm-trusted-firmware/include/drivers/arm/
Dgicv3.h179 #define GICR_IGRPMODR0 (GICR_SGIBASE_OFFSET + U(0xd00)) macro
190 #define GICR_IGRPMODR GICR_IGRPMODR0
/external/arm-trusted-firmware/drivers/arm/gic/v3/
Dgicv3_private.h481 return mmio_read_32(base + GICR_IGRPMODR0); in gicr_read_igrpmodr0()
486 mmio_write_32(base + GICR_IGRPMODR0, val); in gicr_write_igrpmodr0()