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Searched refs:GICR_ISENABLER0 (Results 1 – 4 of 4) sorted by relevance

/external/arm-trusted-firmware/plat/mediatek/mt8192/
Dplat_mt_gic.c104 gic_data.saved_enable = mmio_read_32(gicr_base + GICR_ISENABLER0); in mt_gic_rdistif_save()
121 mmio_write_32(gicr_base + GICR_ISENABLER0, in mt_gic_rdistif_restore()
138 mmio_write_32(gicr_base + GICR_ISENABLER0, in mt_gic_rdistif_restore_all()
/external/arm-trusted-firmware/plat/mediatek/mt8183/
Dplat_mt_gic.c119 gic_data.saved_enable = mmio_read_32(gicr_base + GICR_ISENABLER0); in mt_gic_rdistif_save()
136 mmio_write_32(gicr_base + GICR_ISENABLER0, gic_data.saved_enable); in mt_gic_rdistif_restore()
/external/arm-trusted-firmware/include/drivers/arm/
Dgicv3.h170 #define GICR_ISENABLER0 (GICR_SGIBASE_OFFSET + U(0x100)) macro
183 #define GICR_ISENABLER GICR_ISENABLER0
/external/arm-trusted-firmware/drivers/arm/gic/v3/
Dgicv3_private.h555 return mmio_read_32(base + GICR_ISENABLER0); in gicr_read_isenabler0()
560 mmio_write_32(base + GICR_ISENABLER0, val); in gicr_write_isenabler0()