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Searched refs:GRF_BASE (Results 1 – 18 of 18) sorted by relevance

/external/arm-trusted-firmware/plat/rockchip/rk3399/drivers/pmu/
Dpmu.c849 mmio_write_32(GRF_BASE + GRF_SOC_CON4, CCI_FORCE_WAKEUP); in sys_slp_config()
922 iomux_status[i] = mmio_read_32(GRF_BASE + in suspend_apio()
924 pull_mode_status[i] = mmio_read_32(GRF_BASE + in suspend_apio()
945 mmio_write_32(GRF_BASE + GRF_GPIO3A_IOMUX, in suspend_apio()
947 mmio_write_32(GRF_BASE + GRF_GPIO3B_IOMUX, in suspend_apio()
949 mmio_write_32(GRF_BASE + GRF_GPIO3C_IOMUX, in suspend_apio()
953 mmio_write_32(GRF_BASE + GRF_GPIO3A_P, REG_SOC_WMSK | 0); in suspend_apio()
954 mmio_write_32(GRF_BASE + GRF_GPIO3B_P, REG_SOC_WMSK | 0); in suspend_apio()
955 mmio_write_32(GRF_BASE + GRF_GPIO3C_P, REG_SOC_WMSK | 0); in suspend_apio()
965 mmio_write_32(GRF_BASE + GRF_GPIO2A_IOMUX, in suspend_apio()
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/external/arm-trusted-firmware/plat/rockchip/rk3399/drivers/pwm/
Dpwm.c34 val = mmio_read_32(GRF_BASE + GRF_GPIO4C_IOMUX); in disable_pwms()
40 mmio_write_32(GRF_BASE + GRF_GPIO4C_IOMUX, val); in disable_pwms()
43 val = mmio_read_32(GRF_BASE + GRF_GPIO4C_IOMUX); in disable_pwms()
49 mmio_write_32(GRF_BASE + GRF_GPIO4C_IOMUX, val); in disable_pwms()
114 mmio_write_32(GRF_BASE + GRF_GPIO4C_IOMUX, val); in enable_pwms()
121 mmio_write_32(GRF_BASE + GRF_GPIO4C_IOMUX, val); in enable_pwms()
/external/arm-trusted-firmware/plat/rockchip/rk3399/drivers/gpio/
Drk3399_gpio.c176 val = mmio_read_32(GRF_BASE + GRF_GPIO2A_P + in get_pull()
235 mmio_write_32(GRF_BASE + GRF_GPIO2A_P + in set_pull()
365 mmio_read_32(GRF_BASE + GRF_GPIO2A_IOMUX + i * 4); in plat_rockchip_save_gpio()
374 mmio_write_32(GRF_BASE + GRF_GPIO2A_IOMUX + i * 4, in plat_rockchip_restore_gpio()
/external/arm-trusted-firmware/plat/rockchip/rk3328/drivers/pmu/
Dpmu.c221 val = mmio_read_32(GRF_BASE + GRF_GPIO2D_IOMUX); in rockchip_soc_system_off()
223 mmio_write_32(GRF_BASE + GRF_GPIO2D_IOMUX, val); in rockchip_soc_system_off()
471 sram_data.pmic_sleep_save = mmio_read_32(GRF_BASE + PMIC_SLEEP_REG); in rk3328_pmic_suspend()
474 mmio_write_32(GRF_BASE + PMIC_SLEEP_REG, BITS_WITH_WMASK(0, 0x3, 4)); in rk3328_pmic_suspend()
485 mmio_write_32(GRF_BASE + PMIC_SLEEP_REG, in rk3328_pmic_resume()
Dpmu.h69 #define CHECK_CPU_WFIE_BASE (GRF_BASE + GRF_CPU_STATUS(1))
/external/arm-trusted-firmware/plat/rockchip/rk3368/
Drk3368_def.h25 #define GRF_BASE 0xff770000 macro
/external/arm-trusted-firmware/plat/rockchip/rk3288/
Drk3288_def.h63 #define GRF_BASE 0xff770000 macro
/external/arm-trusted-firmware/plat/rockchip/rk3328/
Drk3328_def.h36 #define GRF_BASE 0xff100000 macro
/external/arm-trusted-firmware/plat/rockchip/px30/
Dpx30_def.h49 #define GRF_BASE 0xff140000 macro
/external/arm-trusted-firmware/plat/rockchip/rk3399/include/shared/
Daddressmap_shared.h39 #define GRF_BASE (MMIO_BASE + 0x07770000) macro
/external/arm-trusted-firmware/plat/rockchip/px30/drivers/soc/
Dsoc.c100 mmio_write_32(GRF_BASE + GRF_SOC_CON(2), in soc_reset_config_all()
/external/arm-trusted-firmware/plat/rockchip/rk3368/drivers/ddr/
Dddr_rk3368.c383 p_ddr_reg->phypllockaddr = GRF_BASE + GRF_SOC_STATUS0; in ddr_reg_save()
430 p_ddr_reg->grfregaddr = GRF_BASE + GRF_DDRC0_CON0; in ddr_reg_save()
431 p_ddr_reg->grfddrcreg = (mmio_read_32(GRF_BASE + GRF_DDRC0_CON0) & in ddr_reg_save()
/external/arm-trusted-firmware/plat/rockchip/rk3328/drivers/soc/
Dsoc.c42 MAP_REGION_FLAT(GRF_BASE, GRF_SIZE,
/external/arm-trusted-firmware/plat/rockchip/rk3288/drivers/soc/
Dsoc.c49 MAP_REGION_FLAT(GRF_BASE, GRF_SIZE,
/external/arm-trusted-firmware/plat/rockchip/rk3399/drivers/dram/
Ddfs.c1821 mmio_write_32(GRF_BASE + GRF_DDRC1_CON1, in dram_low_power_config()
1828 mmio_write_32(GRF_BASE + GRF_DDRC0_CON1, in dram_low_power_config()
1874 mmio_write_32(GRF_BASE + GRF_SOC_CON(0), 0xffffffff); in dram_dfs_init()
1875 mmio_write_32(GRF_BASE + GRF_SOC_CON(1), 0xffffffff); in dram_dfs_init()
1876 mmio_write_32(GRF_BASE + GRF_SOC_CON(2), 0xffffffff); in dram_dfs_init()
1877 mmio_write_32(GRF_BASE + GRF_SOC_CON(3), 0xffffffff); in dram_dfs_init()
1878 mmio_write_32(GRF_BASE + GRF_SOC_CON(4), 0x70007000); in dram_dfs_init()
/external/arm-trusted-firmware/plat/rockchip/rk3368/drivers/soc/
Dsoc.c49 MAP_REGION_FLAT(GRF_BASE, GRF_SIZE,
/external/arm-trusted-firmware/plat/rockchip/rk3288/drivers/pmu/
Dpmu.c135 reg = mmio_read_32(GRF_BASE + reg_offset[i]); in rk3288_sleep_disable_osc()
/external/arm-trusted-firmware/plat/rockchip/px30/drivers/pmu/
Dpmu.c373 while (!(mmio_read_32(GRF_BASE + GRF_CPU_STATUS1) & wfie_msk) && in check_cpu_wfie()
379 if ((mmio_read_32(GRF_BASE + GRF_CPU_STATUS1) & wfie_msk) == 0) { in check_cpu_wfie()