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Searched refs:GetLane (Results 1 – 14 of 14) sorted by relevance

/external/gemmlowp/internal/
Doutput_sse.h189 *dst->data(row + 0, col) = GetLane<0>(src.buf.reg[0]);
190 *dst->data(row + 1, col) = GetLane<1>(src.buf.reg[0]);
191 *dst->data(row + 2, col) = GetLane<2>(src.buf.reg[0]);
192 *dst->data(row + 3, col) = GetLane<3>(src.buf.reg[0]);
205 *dst->data(row + 0, col) = GetLane<0>(src.buf.reg[0]);
206 *dst->data(row + 1, col) = GetLane<1>(src.buf.reg[0]);
207 *dst->data(row + 2, col) = GetLane<2>(src.buf.reg[0]);
208 *dst->data(row + 3, col) = GetLane<3>(src.buf.reg[0]);
209 *dst->data(row + 4, col) = GetLane<0>(src.buf.reg[1]);
210 *dst->data(row + 5, col) = GetLane<1>(src.buf.reg[1]);
[all …]
Doutput_msa.h353 *dst->data(row + 0, col) = GetLane<0>(src.buf.reg[0]);
354 *dst->data(row + 1, col) = GetLane<1>(src.buf.reg[0]);
355 *dst->data(row + 2, col) = GetLane<2>(src.buf.reg[0]);
356 *dst->data(row + 3, col) = GetLane<3>(src.buf.reg[0]);
369 *dst->data(row + 0, col) = GetLane<0>(src.buf.reg[0]);
370 *dst->data(row + 1, col) = GetLane<1>(src.buf.reg[0]);
371 *dst->data(row + 2, col) = GetLane<2>(src.buf.reg[0]);
372 *dst->data(row + 3, col) = GetLane<3>(src.buf.reg[0]);
373 *dst->data(row + 4, col) = GetLane<0>(src.buf.reg[1]);
374 *dst->data(row + 5, col) = GetLane<1>(src.buf.reg[1]);
[all …]
Dsimd_wrappers_sse.h73 std::int32_t GetLane(Int32x4 value) {
Dsimd_wrappers_msa.h92 std::int32_t GetLane(Int32x4 value) {
Dsimd_wrappers_neon.h77 std::int32_t GetLane(Int32x4 value) {
/external/vixl/test/aarch64/
Dtest-utils-aarch64.h61 T GetLane(int lane) const { in GetLane() function
168 return dump_.z_[code].GetLane<T>(lane); in zreg_lane()
201 Chunk chunk = dump_.p_[code].GetLane<Chunk>(chunk_index); in preg_lane()
277 bool match = ((dump_.q_[code].GetLane<uint64_t>(0) == dump_.d_[code]) && in VRegAliasesMatch()
Dtest-utils-aarch64.cc97 expected.GetLane<uint64_t>(1), in Equal128()
98 expected.GetLane<uint64_t>(0), in Equal128()
99 result.GetLane<uint64_t>(1), in Equal128()
100 result.GetLane<uint64_t>(0)); in Equal128()
/external/vixl/src/aarch64/
Dsimulator-aarch64.h302 return GetLane<T>(0); in Get()
308 T GetLane(int lane) const { in GetLane() function
315 return GetLane(lane);
417 uint8_t byte = register_.GetLane<uint8_t>(byte_index); in SetActive()
426 uint8_t byte = register_.GetLane<uint8_t>(byte_index); in IsActive()
454 return register_.GetLane<T>(lane); in GetActiveMask()
517 element = register_.GetLane<int8_t>(index); in Int()
520 element = register_.GetLane<int16_t>(index); in Int()
523 element = register_.GetLane<int32_t>(index); in Int()
526 element = register_.GetLane<int64_t>(index); in Int()
[all …]
Dlogic-aarch64.cc7384 offset = vector_->GetLane<uint32_t>(lane); in GetStructAddress()
7387 offset = vector_->GetLane<uint64_t>(lane); in GetStructAddress()
Dsimulator-aarch64.cc10694 MemWrite(address + i, pt.GetLane<uint8_t>(i)); in VisitSVEStorePredicateRegister()
10714 MemWrite(address + i, zt.GetLane<uint8_t>(i)); in VisitSVEStoreVectorRegister()
/external/vixl/src/aarch32/
Dassembler-aarch32.cc520 if ((lane.GetLane() & 7) != lane.GetLane()) { in Dt_U_opc1_opc2_1()
523 SetEncodingValue(0x8 | lane.GetLane()); in Dt_U_opc1_opc2_1()
526 if ((lane.GetLane() & 3) != lane.GetLane()) { in Dt_U_opc1_opc2_1()
529 SetEncodingValue(0x1 | (lane.GetLane() << 1)); in Dt_U_opc1_opc2_1()
532 if ((lane.GetLane() & 7) != lane.GetLane()) { in Dt_U_opc1_opc2_1()
535 SetEncodingValue(0x18 | lane.GetLane()); in Dt_U_opc1_opc2_1()
538 if ((lane.GetLane() & 3) != lane.GetLane()) { in Dt_U_opc1_opc2_1()
541 SetEncodingValue(0x11 | (lane.GetLane() << 1)); in Dt_U_opc1_opc2_1()
544 if ((lane.GetLane() & 1) != lane.GetLane()) { in Dt_U_opc1_opc2_1()
547 SetEncodingValue(0x0 | (lane.GetLane() << 2)); in Dt_U_opc1_opc2_1()
[all …]
Dinstructions-aarch32.h224 SRegister GetLane(uint32_t lane) const { in GetLane() function
330 uint32_t GetLane() const { return lane_; } in GetLane() function
359 if (lane.GetLane() == static_cast<uint32_t>(-1)) return os << "??]";
360 return os << lane.GetLane() << "]";
Ddisasm-aarch32.cc79 int GetLane() const { return lane_; } in GetLane() function in vixl::aarch32::DecodeNeon
14948 int lane = decode_neon.GetLane(); in DecodeT32()
14990 int lane = decode_neon.GetLane(); in DecodeT32()
15034 int lane = decode_neon.GetLane(); in DecodeT32()
15097 int lane = decode_neon.GetLane(); in DecodeT32()
15142 int lane = decode_neon.GetLane(); in DecodeT32()
15189 int lane = decode_neon.GetLane(); in DecodeT32()
15306 int lane = decode_neon.GetLane(); in DecodeT32()
15350 int lane = decode_neon.GetLane(); in DecodeT32()
15396 int lane = decode_neon.GetLane(); in DecodeT32()
[all …]
/external/deqp-deps/amber/src/vulkan/
Dengine_vulkan_debugger.cc421 const Variables* GetLane(const Variables& lanes, int lane) { in GetLane() function in amber::vulkan::__anonf24a5b550111::Client
731 if (auto lane = client_.GetLane(locals, lane_)) { in ExpectLocalT()
1076 auto lane_var = client.GetLane(locals, i); in FindLocal()