Home
last modified time | relevance | path

Searched refs:HADD (Results 1 – 19 of 19) sorted by relevance

/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
DX86IntrinsicsInfo.h380 X86_INTRINSIC_DATA(avx2_phadd_d, INTR_TYPE_2OP, X86ISD::HADD, 0),
381 X86_INTRINSIC_DATA(avx2_phadd_w, INTR_TYPE_2OP, X86ISD::HADD, 0),
1096 X86_INTRINSIC_DATA(ssse3_phadd_d_128, INTR_TYPE_2OP, X86ISD::HADD, 0),
1097 X86_INTRINSIC_DATA(ssse3_phadd_w_128, INTR_TYPE_2OP, X86ISD::HADD, 0),
DX86ScheduleZnver2.td1112 // HADD, HSUB PS/PD
1451 // HADD, HSUB PS/PD
DX86ScheduleZnver1.td1114 // HADD, HSUB PS/PD
1461 // HADD, HSUB PS/PD
DX86ISelLowering.h227 HADD, enumerator
DX86InstrFragmentsSIMD.td60 def X86hadd : SDNode<"X86ISD::HADD", SDTIntBinOp>;
DX86ISelLowering.cpp9239 case ISD::ADD: HOpcode = X86ISD::HADD; break; in isHopBuildVector()
9385 X86Opcode = X86ISD::HADD; in LowerToHorizontalOp()
9419 X86Opcode = X86ISD::HADD; in LowerToHorizontalOp()
20366 case ISD::ADD: HOpcode = X86ISD::HADD; break; in lowerAddSubToHorizontalOp()
20376 (HOpcode == X86ISD::HADD || HOpcode == X86ISD::FHADD)) in lowerAddSubToHorizontalOp()
29651 case X86ISD::HADD: return "X86ISD::HADD"; in getTargetNodeName()
34541 (Opcode0 == X86ISD::FHADD || Opcode0 == X86ISD::HADD || in combineTargetShuffle()
35130 if (HOp.getOpcode() != X86ISD::HADD && HOp.getOpcode() != X86ISD::FHADD && in foldShuffleOfHorizOp()
35541 case X86ISD::HADD: in SimplifyDemandedVectorEltsForTargetNode()
35726 case X86ISD::HADD: in SimplifyDemandedVectorEltsForTargetNode()
[all …]
/external/llvm-project/llvm/lib/Target/X86/
DX86IntrinsicsInfo.h380 X86_INTRINSIC_DATA(avx2_phadd_d, INTR_TYPE_2OP, X86ISD::HADD, 0),
381 X86_INTRINSIC_DATA(avx2_phadd_w, INTR_TYPE_2OP, X86ISD::HADD, 0),
1102 X86_INTRINSIC_DATA(ssse3_phadd_d_128, INTR_TYPE_2OP, X86ISD::HADD, 0),
1103 X86_INTRINSIC_DATA(ssse3_phadd_w_128, INTR_TYPE_2OP, X86ISD::HADD, 0),
DX86ISelLowering.h251 HADD, enumerator
DX86ScheduleZnver1.td1117 // HADD, HSUB PS/PD
1464 // HADD, HSUB PS/PD
DX86InstrFragmentsSIMD.td60 def X86hadd : SDNode<"X86ISD::HADD", SDTIntBinOp>;
DX86ISelLowering.cpp9512 case ISD::ADD: HOpcode = X86ISD::HADD; break; in isHopBuildVector()
9658 X86Opcode = X86ISD::HADD; in LowerToHorizontalOp()
9692 X86Opcode = X86ISD::HADD; in LowerToHorizontalOp()
10864 case X86ISD::HADD: in IsElementEquivalent()
21485 case ISD::ADD: HOpcode = X86ISD::HADD; break; in lowerAddSubToHorizontalOp()
21495 (HOpcode == X86ISD::HADD || HOpcode == X86ISD::FHADD)) in lowerAddSubToHorizontalOp()
30796 NODE_NAME_CASE(HADD) in getTargetNodeName()
35886 bool isHoriz = (Opcode0 == X86ISD::FHADD || Opcode0 == X86ISD::HADD || in canonicalizeShuffleMaskWithHorizOp()
37471 if (HOp.getOpcode() != X86ISD::HADD && HOp.getOpcode() != X86ISD::FHADD && in foldShuffleOfHorizOp()
37888 case X86ISD::HADD: in SimplifyDemandedVectorEltsForTargetNode()
[all …]
/external/llvm/lib/Target/X86/
DX86ISelLowering.h230 HADD, enumerator
DX86IntrinsicsInfo.h287 X86_INTRINSIC_DATA(avx2_phadd_d, INTR_TYPE_2OP, X86ISD::HADD, 0),
288 X86_INTRINSIC_DATA(avx2_phadd_w, INTR_TYPE_2OP, X86ISD::HADD, 0),
1942 X86_INTRINSIC_DATA(ssse3_phadd_d_128, INTR_TYPE_2OP, X86ISD::HADD, 0),
1943 X86_INTRINSIC_DATA(ssse3_phadd_w_128, INTR_TYPE_2OP, X86ISD::HADD, 0),
DX86InstrFragmentsSIMD.td67 def X86hadd : SDNode<"X86ISD::HADD", SDTIntBinOp>;
DX86SchedHaswell.td1872 // HADD, HSUB PS/PD
DX86ISelLowering.cpp6403 return DAG.getNode(X86ISD::HADD, DL, VT, InVec0, InVec1); in LowerToHorizontalOp()
6437 X86Opcode = X86ISD::HADD; in LowerToHorizontalOp()
6470 X86Opcode = X86ISD::HADD; in LowerToHorizontalOp()
22131 case X86ISD::HADD: return "X86ISD::HADD"; in getTargetNodeName()
30778 return DAG.getNode(X86ISD::HADD, SDLoc(N), VT, Op0, Op1); in combineAdd()
/external/llvm-project/llvm/lib/Target/AArch64/
DAArch64SchedFalkorDetails.td665 def : InstRW<[FalkorWr_1VXVY_2cyc], (instregex "^(S|U)(ADDLP|HADD|HSUB|SHL)(v2i32|v4i16|v8i8)(_v.…
729 def : InstRW<[FalkorWr_2VXVY_2cyc], (instregex "^(S|U)(ADDLP|HADD|HSUB|SHL)(v16i8|v2i64|v4i32|v8i…
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/
DAArch64SchedFalkorDetails.td665 def : InstRW<[FalkorWr_1VXVY_2cyc], (instregex "^(S|U)(ADDLP|HADD|HSUB|SHL)(v2i32|v4i16|v8i8)(_v.…
729 def : InstRW<[FalkorWr_2VXVY_2cyc], (instregex "^(S|U)(ADDLP|HADD|HSUB|SHL)(v16i8|v2i64|v4i32|v8i…
/external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/X86/
DX86GenFastISel.inc12235 // FastEmit functions for X86ISD::HADD.
15178 case X86ISD::HADD: return fastEmit_X86ISD_HADD_rr(VT, RetVT, Op0, Op0IsKill, Op1, Op1IsKill);