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Searched refs:HSLS_ICFG_REGS_BASE (Results 1 – 2 of 2) sorted by relevance

/external/arm-trusted-firmware/plat/brcm/board/stingray/include/
Dsr_def.h178 #define HSLS_ICFG_REGS_BASE IPROC_ROOT macro
187 #define ICFG_CHIP_ID HSLS_ICFG_REGS_BASE
191 #define ICFG_CHIP_REVISION_ID (HSLS_ICFG_REGS_BASE + 0x4)
283 #define ICFG_PKA_MEM_PWR_CTRL (HSLS_ICFG_REGS_BASE + 0xac0)
325 #define ICFG_DMAC_CONFIG_0 (HSLS_ICFG_REGS_BASE + 0x190)
326 #define ICFG_DMAC_CONFIG_1 (HSLS_ICFG_REGS_BASE + 0x194)
327 #define ICFG_DMAC_CONFIG_2 (HSLS_ICFG_REGS_BASE + 0x198)
329 #define ICFG_DMAC_CONFIG_3 (HSLS_ICFG_REGS_BASE + 0x19c)
331 #define ICFG_DMAC_SID_ARADDR_CONTROL (HSLS_ICFG_REGS_BASE + 0xaf0)
332 #define ICFG_DMAC_SID_AWADDR_CONTROL (HSLS_ICFG_REGS_BASE + 0xaf4)
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/external/arm-trusted-firmware/plat/brcm/board/stingray/src/
Dbl31_setup.c276 #define ICFG_AMAC_STRAP_CONFIG (HSLS_ICFG_REGS_BASE + 0xa5c)
279 #define ICFG_AMAC_MAC_CTRL_REG (HSLS_ICFG_REGS_BASE + 0xa6c)
281 #define ICFG_AMAC_RGMII_PHY_CONFIG (HSLS_ICFG_REGS_BASE + 0xa60)
282 #define ICFG_AMAC_SID_CONTROL (HSLS_ICFG_REGS_BASE + 0xb10)
291 #define ICFG_AMAC_MEM_PWR_CTRL (HSLS_ICFG_REGS_BASE + 0xa68)
555 #define ICFG_AUDIO_POWER_CTRL (HSLS_ICFG_REGS_BASE + 0xaa8)
565 #define ICFG_AUDIO_SID_CONTROL (HSLS_ICFG_REGS_BASE + 0xaf8)