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Searched refs:HSLS_MODE_SEL_CONTROL (Results 1 – 1 of 1) sorted by relevance

/external/arm-trusted-firmware/plat/brcm/board/stingray/include/
Dsr_def.h180 #define HSLS_MODE_SEL_CONTROL 0x68a40000 macro
265 #define HSLS_IOPAD_BASE HSLS_MODE_SEL_CONTROL
272 #define IPROC_IOPAD_MODE_BASE (HSLS_MODE_SEL_CONTROL + 0x29c)
273 #define UART0_SIN_MODE_SEL_CONTROL (HSLS_MODE_SEL_CONTROL + 0x4a8)
274 #define UART0_SOUT_MODE_SEL_CONTROL (HSLS_MODE_SEL_CONTROL + 0x4ac)
275 #define UART1_SIN_MODE_SEL_CONTROL (HSLS_MODE_SEL_CONTROL + 0x3b8)
276 #define UART1_SOUT_MODE_SEL_CONTROL (HSLS_MODE_SEL_CONTROL + 0x3bc)
589 #define QSPI_HOLD_N_MODE_SEL_CONTROL (HSLS_MODE_SEL_CONTROL + 0x3e8)
590 #define QSPI_WP_N_MODE_SEL_CONTROL (HSLS_MODE_SEL_CONTROL + 0x3ec)
591 #define QSPI_SCK_MODE_SEL_CONTROL (HSLS_MODE_SEL_CONTROL + 0x3f0)
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