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Searched refs:ICC_EOIR0_EL1 (Results 1 – 9 of 9) sorted by relevance

/external/arm-trusted-firmware/include/arch/aarch64/
Darch_helpers.h481 DEFINE_RENAME_SYSREG_WRITE_FUNC(icc_eoir0_el1, ICC_EOIR0_EL1) in DEFINE_SYSREG_READ_FUNC()
Darch.h95 #define ICC_EOIR0_EL1 S3_0_c12_c8_1 macro
/external/llvm-project/llvm/test/MC/Disassembler/AArch64/
Dgicv3-regs.txt115 # CHECK: msr {{icc_eoir0_el1|ICC_EOIR0_EL1}}, x5
/external/llvm/test/MC/Disassembler/AArch64/
Dgicv3-regs.txt119 # CHECK: msr {{icc_eoir0_el1|ICC_EOIR0_EL1}}, x5
/external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/AArch64/
DAArch64GenSystemOperands.inc305 ICC_EOIR0_EL1 = 50753,
2369 { "ICC_EOIR0_EL1", 0xC641, false, true, {} }, // 115
3281 { "ICC_EOIR0_EL1", 115 },
/external/llvm/lib/Target/AArch64/
DAArch64SystemOperands.td444 def : WOSysReg<"ICC_EOIR0_EL1", 0b11, 0b000, 0b1100, 0b1000, 0b001>;
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/
DAArch64SystemOperands.td718 def : WOSysReg<"ICC_EOIR0_EL1", 0b11, 0b000, 0b1100, 0b1000, 0b001>;
/external/llvm-project/llvm/lib/Target/AArch64/
DAArch64SystemOperands.td723 def : WOSysReg<"ICC_EOIR0_EL1", 0b11, 0b000, 0b1100, 0b1000, 0b001>;
/external/arm-trusted-firmware/docs/getting_started/
Dporting-guide.rst2682 (``GICC_EOIR``) in case of GICv2, and to ``ICC_EOIR0_EL1`` or ``ICC_EOIR1_EL1``