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Searched refs:ICIALLU (Results 1 – 5 of 5) sorted by relevance

/external/arm-trusted-firmware/bl32/sp_min/
Dwa_cve_2017_5715_icache_inv.S27 stcopr r0, ICIALLU
/external/ms-tpm-20-ref/Samples/Nucleo-TPM/L476RG/Drivers/CMSIS/Include/
Dcore_cm7.h534 __OM uint32_t ICIALLU; /*!< Offset: 0x250 ( /W) I-Cache Invalidate All to PoU */ member
2078 SCB->ICIALLU = 0UL; /* invalidate I-Cache */ in SCB_EnableICache()
2096 SCB->ICIALLU = 0UL; /* invalidate I-Cache */ in SCB_DisableICache()
2112 SCB->ICIALLU = 0UL; in SCB_InvalidateICache()
/external/ms-tpm-20-ref/Samples/Nucleo-TPM/L4A6RG/Drivers/CMSIS/Include/
Dcore_cm7.h534 __OM uint32_t ICIALLU; /*!< Offset: 0x250 ( /W) I-Cache Invalidate All to PoU */ member
2078 SCB->ICIALLU = 0UL; /* invalidate I-Cache */ in SCB_EnableICache()
2096 SCB->ICIALLU = 0UL; /* invalidate I-Cache */ in SCB_DisableICache()
2112 SCB->ICIALLU = 0UL; in SCB_InvalidateICache()
/external/arm-trusted-firmware/docs/security_advisories/
Dsecurity-advisory-tfv-6.rst114 branch predictor by performing an ``ICIALLU`` instruction.
/external/arm-trusted-firmware/include/arch/aarch32/
Darch.h533 #define ICIALLU p15, 0, c7, c5, 0 macro