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Searched refs:ID_AA64PFR1_EL1_SSBS_SHIFT (Results 1 – 6 of 6) sorted by relevance

/external/arm-trusted-firmware/services/arm_arch_svc/
Darm_arch_svc_setup.c47 ssbs = (read_id_aa64pfr1_el1() >> ID_AA64PFR1_EL1_SSBS_SHIFT) & in smccc_arch_features()
/external/arm-trusted-firmware/lib/cpus/aarch64/
Dneoverse_n2.S29 tst x0, #(ID_AA64PFR1_EL1_SSBS_MASK << ID_AA64PFR1_EL1_SSBS_SHIFT)
Drainier.S34 tst x0, #(ID_AA64PFR1_EL1_SSBS_MASK << ID_AA64PFR1_EL1_SSBS_SHIFT)
Dcortex_a76.S575 lsr x0, x0, #ID_AA64PFR1_EL1_SSBS_SHIFT
Dneoverse_n1.S70 tst x0, #(ID_AA64PFR1_EL1_SSBS_MASK << ID_AA64PFR1_EL1_SSBS_SHIFT)
/external/arm-trusted-firmware/include/arch/aarch64/
Darch.h272 #define ID_AA64PFR1_EL1_SSBS_SHIFT U(4) macro