Searched refs:ID_MASK_ (Results 1 – 12 of 12) sorted by relevance
144 ID_MASK_ = (((1 << ID_WIDTH_) - 1) << ID_SHIFT_) enumerator189 ID_MASK_ = (((1 << ID_WIDTH_) - 1) << ID_SHIFT_) enumerator
797 const unsigned Id = SImm16 & ID_MASK_; in printSendMsg()800 if ((SImm16 & ~ID_MASK_) != 0) // Unused/unknown bits must be 0. in printSendMsg()806 if ((SImm16 & ~(ID_MASK_|OP_GS_MASK_|STREAM_ID_MASK_)) != 0) // Unused/unknown bits must be 0. in printSendMsg()820 if ((SImm16 & ~(ID_MASK_|OP_SYS_MASK_)) != 0) // Unused/unknown bits must be 0. in printSendMsg()865 const unsigned Id = (SImm16 & ID_MASK_) >> ID_SHIFT_; in printHwreg()
275 ID_MASK_ = (((1 << ID_WIDTH_) - 1) << ID_SHIFT_) enumerator339 ID_MASK_ = (((1 << ID_WIDTH_) - 1) << ID_SHIFT_) enumerator
246 if (((Dst & AMDGPU::Hwreg::ID_MASK_) >> AMDGPU::Hwreg::ID_SHIFT_) != in processBlockPhase1()
128 return RegOp->getImm() & AMDGPU::Hwreg::ID_MASK_; in getHWReg()
875 ((MI.getOperand(0).getImm() & AMDGPU::SendMsg::ID_MASK_) == in generateWaitcntInstBefore()
280 ID_MASK_ = (((1 << ID_WIDTH_) - 1) << ID_SHIFT_) enumerator346 ID_MASK_ = (((1 << ID_WIDTH_) - 1) << ID_SHIFT_) enumerator
253 if (((Dst & AMDGPU::Hwreg::ID_MASK_) >> AMDGPU::Hwreg::ID_SHIFT_) != in processBlockPhase1()
139 return RegOp->getImm() & AMDGPU::Hwreg::ID_MASK_; in getHWReg()
886 ((MI.getOperand(0).getImm() & AMDGPU::SendMsg::ID_MASK_) == in generateWaitcntInstBefore()
757 Id = (Val & ID_MASK_) >> ID_SHIFT_; in decodeHwreg()862 MsgId = Val & ID_MASK_; in decodeMsg()
805 Id = (Val & ID_MASK_) >> ID_SHIFT_; in decodeHwreg()1008 MsgId = Val & ID_MASK_; in decodeMsg()