Home
last modified time | relevance | path

Searched refs:IN1 (Results 1 – 25 of 33) sorted by relevance

12

/external/boringssl/src/crypto/fipsmodule/modes/asm/
Dghashp8-ppc.pl69 my ($Xl1,$Xm1,$Xh1,$IN1,$H2,$H2h,$H2l)=map("v$_",(13..19));
134 vxor $IN1,$Xl,$t1
136 vsldoi $H2,$IN1,$IN1,8
151 vpmsumd $Xl1,$IN1,$H2l # H^2.lo·H^2.lo
153 vpmsumd $Xm1,$IN1,$H2 # H^2.hi·H^2.lo+H^2.lo·H^2.hi
155 vpmsumd $Xh1,$IN1,$H2h # H^2.hi·H^2.hi
302 lvx_u $IN1,0,$inp
303 le?vperm $IN1,$IN1,$IN1,$lemask
307 vpmsumd $Xl1,$IN1,$Hl # H.lo·Xi+1.lo
310 vpmsumd $Xm1,$IN1,$H # H.hi·Xi+1.lo+H.lo·Xi+1.hi
[all …]
/external/python/cpython2/Modules/cjkcodecs/
D_codecs_cn.c46 Py_UNICODE c = IN1; in ENCODER()
102 Py_UNICODE c = IN1; in ENCODER()
131 unsigned char c = IN1; in DECODER()
160 ucs4_t c = IN1; in ENCODER()
248 unsigned char c = IN1, c2; in DECODER()
334 Py_UNICODE c = IN1; in ENCODER()
389 unsigned char c = IN1; in DECODER()
D_codecs_jp.c23 Py_UNICODE c = IN1; in ENCODER()
86 unsigned char c = IN1, c2; in DECODER()
150 ucs4_t c = IN1; in ENCODER()
237 unsigned char c = IN1; in DECODER()
319 Py_UNICODE c = IN1; in ENCODER()
370 unsigned char c = IN1; in DECODER()
436 Py_UNICODE c = IN1; in ENCODER()
489 unsigned char c = IN1; in DECODER()
544 ucs4_t c = IN1; in ENCODER()
637 unsigned char c = IN1; in DECODER()
D_codecs_tw.c44 unsigned char c = IN1; in DECODER()
72 Py_UNICODE c = IN1; in ENCODER()
98 unsigned char c = IN1; in DECODER()
D_codecs_kr.c37 Py_UNICODE c = IN1; in ENCODER()
105 unsigned char c = IN1; in DECODER()
170 Py_UNICODE c = IN1; in ENCODER()
198 unsigned char c = IN1; in DECODER()
254 Py_UNICODE c = IN1; in ENCODER()
351 unsigned char c = IN1, c2; in DECODER()
D_codecs_hk.c105 unsigned char c = IN1; in DECODER()
D_codecs_iso2022.c200 u4in[0] = (ucs4_t)IN1; in ENCODER()
426 unsigned char c = IN1; in DECODER()
Dcjkcodecs.h119 #define IN1 ((*inbuf)[0]) macro
/external/webp/src/dsp/
Dcommon_sse41.h27 #define WEBP_SSE41_SHUFF(OUT, IN0, IN1) \ argument
31 OUT##3 = _mm_shuffle_epi8(*IN1, shuff0); \
32 OUT##4 = _mm_shuffle_epi8(*IN1, shuff1); \
33 OUT##5 = _mm_shuffle_epi8(*IN1, shuff2);
/external/llvm/test/CodeGen/NVPTX/
Dshfl.ll26 ; CHECK: ld.param.u32 [[IN1:%r[0-9]+]]
28 ; CHECK: shfl.down.{{.}}32 %r{{[0-9]+}}, [[IN1]], [[IN2]], 3;
35 ; CHECK: ld.param.u32 [[IN1:%r[0-9]+]]
37 ; CHECK: shfl.down.{{.}}32 %r{{[0-9]+}}, [[IN1]], 4, [[IN2]];
44 ; CHECK: ld.param.u32 [[IN1:%r[0-9]+]]
47 ; CHECK: shfl.down.{{.}}32 %r{{[0-9]+}}, [[IN1]], [[IN2]], [[IN3]];
/external/llvm-project/llvm/test/CodeGen/NVPTX/
Dshfl.ll26 ; CHECK: ld.param.u32 [[IN1:%r[0-9]+]]
28 ; CHECK: shfl.down.{{.}}32 %r{{[0-9]+}}, [[IN1]], [[IN2]], 3;
35 ; CHECK: ld.param.u32 [[IN1:%r[0-9]+]]
37 ; CHECK: shfl.down.{{.}}32 %r{{[0-9]+}}, [[IN1]], 4, [[IN2]];
44 ; CHECK: ld.param.u32 [[IN1:%r[0-9]+]]
47 ; CHECK: shfl.down.{{.}}32 %r{{[0-9]+}}, [[IN1]], [[IN2]], [[IN3]];
/external/llvm/test/CodeGen/AMDGPU/
Dvtx-schedule.ll11 ; CHECK: VTX_READ_32 [[IN1:T[0-9]+\.X]], [[IN1]], 0
/external/llvm-project/llvm/test/CodeGen/AMDGPU/
Dvtx-schedule.ll11 ; CHECK: VTX_READ_32 [[IN1:T[0-9]+\.X]], [[IN1]], 0
Dfabs.f16.ll57 ; GCN-DAG: s_lshr_b32 [[IN1:s[0-9]+]], [[IN0]], 16
60 ; CI-DAG: v_cvt_f32_f16_e32 [[ABS_CVT1:v[0-9]+]], [[IN1]]
66 ; GFX89: v_mov_b32_e32 [[V_IN1:v[0-9]+]], [[IN1]]
/external/llvm-project/llvm/test/CodeGen/AArch64/
Dscalable-vector-promotion.ll11 ; CHECK-NEXT: [[IN1:%.*]] = load <vscale x 2 x i32>, <vscale x 2 x i32>* [[ADDR1:%.*]], align 8
12 ; CHECK-NEXT: [[EXTRACT:%.*]] = extractelement <vscale x 2 x i32> [[IN1]], i32 1
/external/llvm-project/llvm/test/Transforms/LoadStoreVectorizer/X86/
Dnon-byte-size.ll11 ; CHECK-NEXT: [[IN1:%.*]] = getelementptr [[REC:%.*]], %rec* [[IN:%.*]], i16 0, i32 0
13 ; CHECK-NEXT: [[VAL1:%.*]] = load i32, i32* [[IN1]], align 8
/external/llvm-project/llvm/test/Analysis/ValueTracking/
Dnumsignbits-from-assume.ll21 ; CHECK-NEXT: [[ADD:%.*]] = add i32 [[IN1:%.*]], [[IN2:%.*]]
66 ; CHECK-NEXT: [[SUB:%.*]] = sub i32 [[IN1:%.*]], [[IN2:%.*]]
81 ; CHECK-NEXT: [[MUL:%.*]] = mul i32 [[IN1:%.*]], [[IN2:%.*]]
/external/llvm-project/llvm/test/CodeGen/AArch64/GlobalISel/
Dprelegalizercombiner-extending-loads-cornercases.mir115 # CHECK-WORKLIST: Try combining [[IN0:%[0-9]+]]:_(s8) = G_LOAD [[IN1:%[0-9]+]]:_(p0){{.*}} ::…
117 # CHECK-WORKLIST-DAG: Changing: [[IN0]]:_(s8) = G_LOAD [[IN1]]:_(p0){{.*}} :: (load 1 from %ir.ad…
123 # CHECK-WORKLIST-DAG: Changed: [[IN2]]:_(s32) = G_SEXTLOAD [[IN1]]:_(p0){{.*}} :: (load 1 from %i…
214 # CHECK-WORKLIST: Try combining [[IN0:%[0-9]+]]:_(s8) = G_LOAD [[IN1:%[0-9]+]]:_(p0){{.*}} ::…
216 # CHECK-WORKLIST-DAG: Changing: [[IN0]]:_(s8) = G_LOAD [[IN1]]:_(p0){{.*}} :: (load 1 from %ir.ad…
224 # CHECK-WORKLIST-DAG: Changed: [[IN2]]:_(s32) = G_SEXTLOAD [[IN1]]:_(p0){{.*}} :: (load 1 from %i…
/external/llvm/test/CodeGen/MIR/Lanai/
Dpeephole-compare.mir14 # CHECK: [[IN1:%.*]] = COPY %r7
16 # CHECK: SUB_F_R [[IN1]], [[IN2]], 0, implicit-def %sr
19 # CHECK: [[IN1:%.*]] = COPY %r7
21 # CHECK: SUB_F_R [[IN1]], [[IN2]], 0, implicit-def %sr
24 # CHECK: [[IN1:%.*]] = COPY %r7
26 # CHECK: SUB_F_R [[IN1]], [[IN2]], 0, implicit-def %sr
29 # CHECK: [[IN1:%.*]] = COPY %r7
31 # CHECK: SUB_F_R [[IN1]], [[IN2]], 0, implicit-def %sr
/external/llvm-project/llvm/test/CodeGen/Lanai/
Dpeephole-compare.mir14 # CHECK: [[IN1:%.*]]:gpr = COPY $r7
16 # CHECK: SUB_F_R [[IN1]], [[IN2]], 0, implicit-def $sr
19 # CHECK: [[IN1:%.*]]:gpr = COPY $r7
21 # CHECK: SUB_F_R [[IN1]], [[IN2]], 0, implicit-def $sr
24 # CHECK: [[IN1:%.*]]:gpr = COPY $r7
26 # CHECK: SUB_F_R [[IN1]], [[IN2]], 0, implicit-def $sr
29 # CHECK: [[IN1:%.*]]:gpr = COPY $r7
31 # CHECK: SUB_F_R [[IN1]], [[IN2]], 0, implicit-def $sr
/external/llvm-project/llvm/test/CodeGen/Hexagon/
Dbarrier-flag.ll38 %IN1.084 = phi i8* [ %arrayidx, %for.cond5.preheader.lr.ph ], [ %incdec.ptr, %if.end40 ]
44 %arrayidx8.phi = phi i8* [ %IN1.084, %for.cond5.preheader ], [ %arrayidx8.inc, %for.body7 ]
81 %incdec.ptr = getelementptr inbounds i8, i8* %IN1.084, i32 1
/external/llvm/test/CodeGen/Hexagon/
Dbarrier-flag.ll39 %IN1.084 = phi i8* [ %arrayidx, %for.cond5.preheader.lr.ph ], [ %incdec.ptr, %if.end40 ]
45 %arrayidx8.phi = phi i8* [ %IN1.084, %for.cond5.preheader ], [ %arrayidx8.inc, %for.body7 ]
82 %incdec.ptr = getelementptr inbounds i8, i8* %IN1.084, i32 1
/external/llvm-project/llvm/test/Transforms/ConstantHoisting/X86/
Dbad-cases.ll12 ; CHECK-NEXT: [[L1:%.*]] = phi i64 [ [[RES1:%.*]], [[LOOP]] ], [ [[IN1:%.*]], [[ENTRY:%.*]] ]
45 ; CHECK-NEXT: [[L1:%.*]] = phi i64 [ [[RES1:%.*]], [[LOOP]] ], [ [[IN1:%.*]], [[ENTRY:%.*]] ]
/external/llvm-project/llvm/test/Transforms/SLPVectorizer/AArch64/
Dmismatched-intrinsics.ll8 …: [[VADDLVQ_S32_I:%.*]] = tail call i64 @llvm.arm64.neon.saddlv.i64.v4i32(<4 x i32> [[IN1:%.*]])
/external/llvm-project/llvm/test/Transforms/NewGVN/
Dpredicates.ll15 ; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[IN1:%.*]], i64 [[IDXPROM]]

12