Home
last modified time | relevance | path

Searched refs:INSN (Results 1 – 25 of 67) sorted by relevance

123

/external/arm-neon-tests/
Dref_vuzp.c55 #define TEST_VUZP(INSN, Q, T1, T2, W, N) \ in FNNAME() argument
57 INSN##Q##_##T2##W(VECT_VAR(vector1, T1, W, N), \ in FNNAME()
123 #define TEST_ALL_VUZP(INSN) \ in FNNAME() argument
124 TEST_VUZP(INSN, , int, s, 8, 8); \ in FNNAME()
125 TEST_VUZP(INSN, , int, s, 16, 4); \ in FNNAME()
126 TEST_VUZP(INSN, , int, s, 32, 2); \ in FNNAME()
127 TEST_VUZP(INSN, , uint, u, 8, 8); \ in FNNAME()
128 TEST_VUZP(INSN, , uint, u, 16, 4); \ in FNNAME()
129 TEST_VUZP(INSN, , uint, u, 32, 2); \ in FNNAME()
130 TEST_VUZP(INSN, , poly, p, 8, 8); \ in FNNAME()
[all …]
Dref_vqdmull_n.c34 #define INSN vqdmull macro
39 FNNAME (INSN) in FNNAME() argument
44 #define TEST_VQDMULL_N2(INSN, T1, T2, W, W2, N, L) \ in FNNAME() argument
47 INSN##_n_##T2##W(VECT_VAR(vector, T1, W, N), \ in FNNAME()
51 dump_neon_cumulative_sat(TEST_MSG, xSTR(INSN##_n_##T2##W), \ in FNNAME()
55 #define TEST_VQDMULL_N1(INSN, T1, T2, W, W2, N, L) \ in FNNAME() argument
56 TEST_VQDMULL_N2(INSN, T1, T2, W, W2, N, L) in FNNAME()
59 TEST_VQDMULL_N1(INSN, T1, T2, W, W2, N, L) in FNNAME()
Dref_vqdmull.c34 #define INSN vqdmull macro
39 FNNAME (INSN) in FNNAME() argument
42 #define TEST_VQDMULL2(INSN, T1, T2, W, W2, N) \ in FNNAME() argument
45 INSN##_##T2##W(VECT_VAR(vector, T1, W, N), \ in FNNAME()
49 dump_neon_cumulative_sat(TEST_MSG, xSTR(INSN##_##T2##W), \ in FNNAME()
53 #define TEST_VQDMULL1(INSN, T1, T2, W, W2, N) \ in FNNAME() argument
54 TEST_VQDMULL2(INSN, T1, T2, W, W2, N) in FNNAME()
57 TEST_VQDMULL1(INSN, T1, T2, W, W2, N) in FNNAME()
Dref_vqshrun_n.c34 #define INSN vqshrun_n macro
40 FNNAME (INSN) in FNNAME() argument
43 #define TEST_VQSHRUN_N2(INSN, T1, T2, W, W2, N, V) \ in FNNAME() argument
46 INSN##_##T2##W(VECT_VAR(vector, T1, W, N), \ in FNNAME()
50 dump_neon_cumulative_sat(TEST_MSG, xSTR(INSN##_##T2##W), \ in FNNAME()
54 #define TEST_VQSHRUN_N1(INSN, T1, T2, W, W2, N, V) \ in FNNAME() argument
55 TEST_VQSHRUN_N2(INSN, T1, T2, W, W2, N, V) in FNNAME()
58 TEST_VQSHRUN_N1(INSN, T1, T2, W, W2, N, V) in FNNAME()
Dref_vqdmull_lane.c34 #define INSN vqdmull macro
39 FNNAME (INSN) in FNNAME() argument
44 #define TEST_VQDMULL_LANE2(INSN, T1, T2, W, W2, N, L) \ in FNNAME() argument
47 INSN##_lane_##T2##W(VECT_VAR(vector, T1, W, N), \ in FNNAME()
52 dump_neon_cumulative_sat(TEST_MSG, xSTR(INSN##_lane_##T2##W), \ in FNNAME()
56 #define TEST_VQDMULL_LANE1(INSN, T1, T2, W, W2, N, L) \ in FNNAME() argument
57 TEST_VQDMULL_LANE2(INSN, T1, T2, W, W2, N, L) in FNNAME()
60 TEST_VQDMULL_LANE1(INSN, T1, T2, W, W2, N, L) in FNNAME()
Dref_vqdmulh_n.c34 #define INSN vqdmulh macro
39 FNNAME (INSN) in FNNAME() argument
44 #define TEST_VQDMULH_N2(INSN, Q, T1, T2, W, N, L) \ in FNNAME() argument
47 INSN##Q##_n_##T2##W(VECT_VAR(vector, T1, W, N), \ in FNNAME()
51 dump_neon_cumulative_sat(TEST_MSG, xSTR(INSN##Q##_n_##T2##W), \ in FNNAME()
55 #define TEST_VQDMULH_N1(INSN, Q, T1, T2, W, N, L) \ in FNNAME() argument
56 TEST_VQDMULH_N2(INSN, Q, T1, T2, W, N, L) in FNNAME()
59 TEST_VQDMULH_N1(INSN, Q, T1, T2, W, N, L) in FNNAME()
Dref_vqdmulh_lane.c34 #define INSN vqdmulh macro
39 FNNAME (INSN) in FNNAME() argument
42 #define TEST_VQDMULH_LANE2(INSN, Q, T1, T2, W, N, N2, L) \ in FNNAME() argument
45 INSN##Q##_lane_##T2##W(VECT_VAR(vector, T1, W, N), \ in FNNAME()
50 dump_neon_cumulative_sat(TEST_MSG, xSTR(INSN##Q##_lane_##T2##W), \ in FNNAME()
54 #define TEST_VQDMULH_LANE1(INSN, Q, T1, T2, W, N, N2, L) \ in FNNAME() argument
55 TEST_VQDMULH_LANE2(INSN, Q, T1, T2, W, N, N2, L) in FNNAME()
58 TEST_VQDMULH_LANE1(INSN, Q, T1, T2, W, N, N2, L) in FNNAME()
Dref_vqrdmulh_n.c34 #define INSN vqrdmulh macro
40 FNNAME (INSN) in FNNAME() argument
45 #define TEST_VQRDMULH_N2(INSN, Q, T1, T2, W, N, L) \ in FNNAME() argument
48 INSN##Q##_n_##T2##W(VECT_VAR(vector, T1, W, N), \ in FNNAME()
52 dump_neon_cumulative_sat(TEST_MSG, xSTR(INSN##Q##_n_##T2##W), \ in FNNAME()
56 #define TEST_VQRDMULH_N1(INSN, Q, T1, T2, W, N, L) \ in FNNAME() argument
57 TEST_VQRDMULH_N2(INSN, Q, T1, T2, W, N, L) in FNNAME()
60 TEST_VQRDMULH_N1(INSN, Q, T1, T2, W, N, L) in FNNAME()
Dref_vqdmulh.c34 #define INSN vqdmulh macro
40 FNNAME (INSN) in FNNAME() argument
43 #define TEST_VQDMULH2(INSN, Q, T1, T2, W, N) \ in FNNAME() argument
46 INSN##Q##_##T2##W(VECT_VAR(vector, T1, W, N), \ in FNNAME()
50 dump_neon_cumulative_sat(TEST_MSG, xSTR(INSN##Q##_##T2##W), \ in FNNAME()
54 #define TEST_VQDMULH1(INSN, Q, T1, T2, W, N) \ in FNNAME() argument
55 TEST_VQDMULH2(INSN, Q, T1, T2, W, N) in FNNAME()
58 TEST_VQDMULH1(INSN, Q, T1, T2, W, N) in FNNAME()
Dref_vqrshrun_n.c34 #define INSN vqrshrun_n macro
40 FNNAME (INSN) in FNNAME() argument
43 #define TEST_VQRSHRUN_N2(INSN, T1, T2, W, W2, N, V) \ in FNNAME() argument
46 INSN##_##T2##W(VECT_VAR(vector, T1, W, N), \ in FNNAME()
50 dump_neon_cumulative_sat(TEST_MSG, xSTR(INSN##_##T2##W), \ in FNNAME()
54 #define TEST_VQRSHRUN_N1(INSN, T1, T2, W, W2, N, V) \ in FNNAME() argument
55 TEST_VQRSHRUN_N2(INSN, T1, T2, W, W2, N, V) in FNNAME()
58 TEST_VQRSHRUN_N1(INSN, T1, T2, W, W2, N, V) in FNNAME()
Dref_vqrdmulh_lane.c34 #define INSN vqrdmulh macro
40 FNNAME (INSN) in FNNAME() argument
43 #define TEST_VQRDMULH_LANE2(INSN, Q, T1, T2, W, N, N2, L) \ in FNNAME() argument
46 INSN##Q##_lane_##T2##W(VECT_VAR(vector, T1, W, N), \ in FNNAME()
51 dump_neon_cumulative_sat(TEST_MSG, xSTR(INSN##Q##_lane_##T2##W), \ in FNNAME()
55 #define TEST_VQRDMULH_LANE1(INSN, Q, T1, T2, W, N, N2, L) \ in FNNAME() argument
56 TEST_VQRDMULH_LANE2(INSN, Q, T1, T2, W, N, N2, L) in FNNAME()
59 TEST_VQRDMULH_LANE1(INSN, Q, T1, T2, W, N, N2, L) in FNNAME()
Dref_vqshrn_n.c34 #define INSN vqshrn_n macro
40 FNNAME (INSN) in FNNAME() argument
43 #define TEST_VQSHRN_N2(INSN, T1, T2, W, W2, N, V) \ in FNNAME() argument
46 INSN##_##T2##W(VECT_VAR(vector, T1, W, N), \ in FNNAME()
50 dump_neon_cumulative_sat(TEST_MSG, xSTR(INSN##_##T2##W), \ in FNNAME()
54 #define TEST_VQSHRN_N1(INSN, T1, T2, W, W2, N, V) \ in FNNAME() argument
55 TEST_VQSHRN_N2(INSN, T1, T2, W, W2, N, V) in FNNAME()
58 TEST_VQSHRN_N1(INSN, T1, T2, W, W2, N, V) in FNNAME()
Dref_vqrshrn_n.c34 #define INSN vqrshrn_n macro
40 FNNAME (INSN) in FNNAME() argument
43 #define TEST_VQRSHRN_N2(INSN, T1, T2, W, W2, N, V) \ in FNNAME() argument
46 INSN##_##T2##W(VECT_VAR(vector, T1, W, N), \ in FNNAME()
50 dump_neon_cumulative_sat(TEST_MSG, xSTR(INSN##_##T2##W), \ in FNNAME()
54 #define TEST_VQRSHRN_N1(INSN, T1, T2, W, W2, N, V) \ in FNNAME() argument
55 TEST_VQRSHRN_N2(INSN, T1, T2, W, W2, N, V) in FNNAME()
58 TEST_VQRSHRN_N1(INSN, T1, T2, W, W2, N, V) in FNNAME()
Dref_vqrdmulh.c34 #define INSN vqrdmulh macro
40 FNNAME (INSN) in FNNAME() argument
43 #define TEST_VQRDMULH2(INSN, Q, T1, T2, W, N) \ in FNNAME() argument
46 INSN##Q##_##T2##W(VECT_VAR(vector, T1, W, N), \ in FNNAME()
50 dump_neon_cumulative_sat(TEST_MSG, xSTR(INSN##Q##_##T2##W), \ in FNNAME()
54 #define TEST_VQRDMULH1(INSN, Q, T1, T2, W, N) \ in FNNAME() argument
55 TEST_VQRDMULH2(INSN, Q, T1, T2, W, N) in FNNAME()
58 TEST_VQRDMULH1(INSN, Q, T1, T2, W, N) in FNNAME()
Dref_vqshl_n.c34 #define INSN vqshl macro
40 FNNAME (INSN) in FNNAME() argument
43 #define TEST_VQSHL_N2(INSN, Q, T1, T2, W, N, V) \ in FNNAME() argument
46 INSN##Q##_n_##T2##W(VECT_VAR(vector, T1, W, N), \ in FNNAME()
50 dump_neon_cumulative_sat(TEST_MSG, xSTR(INSN##Q##_n_##T2##W), \ in FNNAME()
54 #define TEST_VQSHL_N1(INSN, T3, Q, T1, T2, W, N) \ in FNNAME() argument
55 TEST_VQSHL_N2(INSN, T3, Q, T1, T2, W, N) in FNNAME()
58 TEST_VQSHL_N1(INSN, T3, Q, T1, T2, W, N) in FNNAME()
Dref_vqshlu_n.c34 #define INSN vqshlu macro
40 FNNAME (INSN) in FNNAME() argument
43 #define TEST_VQSHLU_N2(INSN, Q, T1, T2, T3, T4, W, N, V) \ in FNNAME() argument
46 INSN##Q##_n_##T2##W(VECT_VAR(vector, T1, W, N), \ in FNNAME()
50 dump_neon_cumulative_sat(TEST_MSG, xSTR(INSN##Q##_n_##T2##W), \ in FNNAME()
54 #define TEST_VQSHLU_N1(INSN, Q, T1, T2, T3, T4, W, N, V) \ in FNNAME() argument
55 TEST_VQSHLU_N2(INSN, Q, T1, T2, T3, T4, W, N, V) in FNNAME()
58 TEST_VQSHLU_N1(INSN, Q, T1, T2, T3, T4, W, N, V) in FNNAME()
Dref_vqdmlal_n.c46 #define TEST_VQDMLXL_N1(INSN, T1, T2, W, W2, N, V) \ in FNNAME() argument
49 INSN##_##T2##W2(VECT_VAR(vector, T1, W, N), \ in FNNAME()
54 dump_neon_cumulative_sat(TEST_MSG, xSTR(INSN##_##T2##W2), \ in FNNAME()
57 #define TEST_VQDMLXL_N(INSN, T1, T2, W, W2, N, V) \ in FNNAME() argument
58 TEST_VQDMLXL_N1(INSN, T1, T2, W, W2, N, V) in FNNAME()
Dref_vqmovun.c43 #define TEST_UNARY_OP1(INSN, T1, T2, W, W2, N) \ in FNNAME() argument
46 INSN##_s##W2(VECT_VAR(vector, int, W2, N)); \ in FNNAME()
49 dump_neon_cumulative_sat(TEST_MSG, xSTR(INSN##_s##W2), \ in FNNAME()
52 #define TEST_UNARY_OP(INSN, T1, T2, W, W2, N) \ in FNNAME() argument
53 TEST_UNARY_OP1(INSN, T1, T2, W, W2, N) \ in FNNAME()
Dref_vqdmlal.c47 #define TEST_VQDMLXL1(INSN, T1, T2, W, W2, N) \ in FNNAME() argument
50 INSN##_##T2##W2(VECT_VAR(vector, T1, W, N), \ in FNNAME()
55 dump_neon_cumulative_sat(TEST_MSG, xSTR(INSN##_##T2##W2), \ in FNNAME()
58 #define TEST_VQDMLXL(INSN, T1, T2, W, W2, N) \ in FNNAME() argument
59 TEST_VQDMLXL1(INSN, T1, T2, W, W2, N) in FNNAME()
Dref_v_unary_sat_op.c42 #define TEST_UNARY_SAT_OP1(INSN, Q, T1, T2, W, N) \ in FNNAME() argument
45 INSN##Q##_##T2##W(VECT_VAR(vector, T1, W, N)); \ in FNNAME()
48 dump_neon_cumulative_sat(TEST_MSG, xSTR(INSN##Q##_##T2##W), \ in FNNAME()
51 #define TEST_UNARY_SAT_OP(INSN, Q, T1, T2, W, N) \ in FNNAME() argument
52 TEST_UNARY_SAT_OP1(INSN, Q, T1, T2, W, N) in FNNAME()
Dref_vqdmlal_lane.c46 #define TEST_VQDMLXL_LANE1(INSN, T1, T2, W, W2, N, V) \ in FNNAME() argument
49 INSN##_##T2##W2(VECT_VAR(vector, T1, W, N), \ in FNNAME()
55 dump_neon_cumulative_sat(TEST_MSG, xSTR(INSN##_##T2##W2), \ in FNNAME()
58 #define TEST_VQDMLXL_LANE(INSN, T1, T2, W, W2, N, V) \ in FNNAME() argument
59 TEST_VQDMLXL_LANE1(INSN, T1, T2, W, W2, N, V) in FNNAME()
/external/llvm-project/llvm/test/Transforms/LoopStrengthReduce/X86/
Dlsr-insns-1.ll2 ; RUN: opt < %s -loop-reduce -mtriple=x86_64 -S | FileCheck %s -check-prefix=INSN
23 ; INSN-LABEL: @foo(
24 ; INSN-NEXT: entry:
25 ; INSN-NEXT: [[Q1:%.*]] = bitcast i32* [[Q:%.*]] to i8*
26 ; INSN-NEXT: [[Y3:%.*]] = bitcast i32* [[Y:%.*]] to i8*
27 ; INSN-NEXT: [[X7:%.*]] = bitcast i32* [[X:%.*]] to i8*
28 ; INSN-NEXT: br label [[FOR_BODY:%.*]]
29 ; INSN: for.cond.cleanup:
30 ; INSN-NEXT: ret void
31 ; INSN: for.body:
[all …]
/external/llvm-project/llvm/lib/Target/SystemZ/
DSystemZPatterns.td9 // Record that INSN performs a 64-bit version of unary operator OPERATOR
18 // Record that INSN performs a 64-bit version of binary operator OPERATOR
38 // Record that INSN performs a binary read-modify-write operation,
48 // Record that INSN performs binary operation OPERATION on a byte
56 // Record that INSN performs insertion TYPE into a register of class CLS.
68 // INSN stores the low 32 bits of a GPR to a memory with addressing mode MODE.
75 // INSN and INSNY are an RX/RXY pair of instructions that store the low
84 // INSN stores the low 32 bits of a GPR using PC-relative addressing.
95 // INSN and INSNINV conditionally store the low 32 bits of a GPR to memory,
96 // with INSN storing when the condition is true and INSNINV storing when the
[all …]
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/SystemZ/
DSystemZPatterns.td9 // Record that INSN performs a 64-bit version of unary operator OPERATOR
18 // Record that INSN performs a 64-bit version of binary operator OPERATOR
38 // Record that INSN performs a binary read-modify-write operation,
48 // Record that INSN performs binary operation OPERATION on a byte
56 // Record that INSN performs insertion TYPE into a register of class CLS.
68 // INSN stores the low 32 bits of a GPR to a memory with addressing mode MODE.
75 // INSN and INSNY are an RX/RXY pair of instructions that store the low
84 // INSN stores the low 32 bits of a GPR using PC-relative addressing.
95 // INSN and INSNINV conditionally store the low 32 bits of a GPR to memory,
96 // with INSN storing when the condition is true and INSNINV storing when the
[all …]
/external/llvm/lib/Target/SystemZ/
DSystemZPatterns.td10 // Record that INSN performs a 64-bit version of unary operator OPERATOR
19 // Record that INSN performs a 64-bit version of binary operator OPERATOR
39 // Record that INSN performs a binary read-modify-write operation,
49 // Record that INSN performs binary operation OPERATION on a byte
57 // Record that INSN performs insertion TYPE into a register of class CLS.
69 // INSN stores the low 32 bits of a GPR to a memory with addressing mode MODE.
76 // INSN and INSNY are an RX/RXY pair of instructions that store the low
85 // INSN stores the low 32 bits of a GPR using PC-relative addressing.
96 // INSN and INSNINV conditionally store the low 32 bits of a GPR to memory,
97 // with INSN storing when the condition is true and INSNINV storing when the
[all …]

123