| /external/llvm-project/llvm/test/TableGen/ |
| D | DAGDefaultOps.td | 50 // (INTRINSIC_WO_CHAIN and INTRINSIC_W_CHAIN), which makes the
82 // ADDINT: SwitchOpcode{{.*}}TARGET_VAL(ISD::INTRINSIC_WO_CHAIN)
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| /external/llvm-project/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyISelDAGToDAG.cpp | 126 case ISD::INTRINSIC_WO_CHAIN: { in Select()
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| D | WebAssemblyISelLowering.cpp | 268 setOperationAction(ISD::INTRINSIC_WO_CHAIN, MVT::Other, Custom); in WebAssemblyTargetLowering()
1208 case ISD::INTRINSIC_WO_CHAIN: in LowerOperation()
1453 case ISD::INTRINSIC_WO_CHAIN: in LowerIntrinsic()
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| /external/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 146 INTRINSIC_WO_CHAIN, enumerator
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyISelDAGToDAG.cpp | 166 case ISD::INTRINSIC_WO_CHAIN: { in Select()
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| D | WebAssemblyISelLowering.cpp | 278 setOperationAction(ISD::INTRINSIC_WO_CHAIN, MVT::Other, Custom); in WebAssemblyTargetLowering()
1021 case ISD::INTRINSIC_WO_CHAIN: in LowerOperation()
1224 case ISD::INTRINSIC_WO_CHAIN: in LowerIntrinsic()
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| /external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 152 INTRINSIC_WO_CHAIN, enumerator
|
| /external/llvm-project/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 177 INTRINSIC_WO_CHAIN, enumerator
|
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGDumper.cpp | 116 case ISD::INTRINSIC_WO_CHAIN: in getOperationName()
119 unsigned OpNo = getOpcode() == ISD::INTRINSIC_WO_CHAIN ? 0 : 1; in getOperationName()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGDumper.cpp | 141 case ISD::INTRINSIC_WO_CHAIN: in getOperationName()
144 unsigned OpNo = getOpcode() == ISD::INTRINSIC_WO_CHAIN ? 0 : 1; in getOperationName()
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| /external/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGDumper.cpp | 142 case ISD::INTRINSIC_WO_CHAIN: in getOperationName()
145 unsigned OpNo = getOpcode() == ISD::INTRINSIC_WO_CHAIN ? 0 : 1; in getOperationName()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.cpp | 642 setTargetDAGCombine(ISD::INTRINSIC_WO_CHAIN); in AArch64TargetLowering()
700 setOperationAction(ISD::INTRINSIC_WO_CHAIN, MVT::Other, Custom); in AArch64TargetLowering()
861 setOperationAction(ISD::INTRINSIC_WO_CHAIN, MVT::i8, Custom); in AArch64TargetLowering()
862 setOperationAction(ISD::INTRINSIC_WO_CHAIN, MVT::i16, Custom); in AArch64TargetLowering()
1141 case ISD::INTRINSIC_WO_CHAIN: in computeKnownBitsForTargetNode()
2861 SDValue FPCR_64 = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, MVT::i64, in LowerFLT_ROUNDS_()
3264 case ISD::INTRINSIC_WO_CHAIN: in LowerOperation()
5182 ISD::INTRINSIC_WO_CHAIN, DL, MVT::i32, in LowerCTPOP()
5206 ISD::INTRINSIC_WO_CHAIN, DL, WidenVT, in LowerCTPOP()
7167 ISD::INTRINSIC_WO_CHAIN, DL, IndexVT, in GenerateTBL()
[all …]
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.cpp | 477 setTargetDAGCombine(ISD::INTRINSIC_WO_CHAIN); in AArch64TargetLowering()
518 setOperationAction(ISD::INTRINSIC_WO_CHAIN, MVT::Other, Custom); in AArch64TargetLowering()
767 case ISD::INTRINSIC_WO_CHAIN: in computeKnownBitsForTargetNode()
2406 case ISD::INTRINSIC_WO_CHAIN: in LowerOperation()
3844 ISD::INTRINSIC_WO_CHAIN, DL, MVT::i32, in LowerCTPOP()
5536 ISD::INTRINSIC_WO_CHAIN, DL, IndexVT, in GenerateTBL()
5544 ISD::INTRINSIC_WO_CHAIN, DL, IndexVT, in GenerateTBL()
5556 ISD::INTRINSIC_WO_CHAIN, DL, IndexVT, in GenerateTBL()
5870 case ISD::INTRINSIC_WO_CHAIN: { in getIntrinsicID()
5931 DAG.getNode(ISD::INTRINSIC_WO_CHAIN, DL, VT, in tryLowerToSLI()
[all …]
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| /external/llvm-project/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.cpp | 840 setTargetDAGCombine(ISD::INTRINSIC_WO_CHAIN); in AArch64TargetLowering()
903 setOperationAction(ISD::INTRINSIC_WO_CHAIN, MVT::Other, Custom); in AArch64TargetLowering()
1156 setOperationAction(ISD::INTRINSIC_WO_CHAIN, MVT::i8, Custom); in AArch64TargetLowering()
1157 setOperationAction(ISD::INTRINSIC_WO_CHAIN, MVT::i16, Custom); in AArch64TargetLowering()
1575 case ISD::INTRINSIC_WO_CHAIN: in computeKnownBitsForTargetNode()
4272 case ISD::INTRINSIC_WO_CHAIN: in LowerOperation()
6419 ISD::INTRINSIC_WO_CHAIN, DL, MVT::i32, in LowerCTPOP()
6430 ISD::INTRINSIC_WO_CHAIN, DL, MVT::i32, in LowerCTPOP()
6452 ISD::INTRINSIC_WO_CHAIN, DL, WidenVT, in LowerCTPOP()
8543 ISD::INTRINSIC_WO_CHAIN, DL, IndexVT, in GenerateTBL()
[all …]
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| /external/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 617 setTargetDAGCombine(ISD::INTRINSIC_WO_CHAIN); in ARMTargetLowering()
906 setOperationAction(ISD::INTRINSIC_WO_CHAIN, MVT::Other, Custom); in ARMTargetLowering()
4592 SDValue FPSCR = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, MVT::i32, in LowerFLT_ROUNDS_()
4662 SDValue Cnt16 = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, VT16Bit, in LowerCTTZ()
4669 SDValue Cnt32 = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, VT32Bit, in LowerCTTZ()
4676 SDValue Cnt64 = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, VT, in LowerCTTZ()
4810 return DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, VT, in LowerShift()
4828 return DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, VT, in LowerShift()
6723 Y = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, MVT::v4f32, in LowerSDIV_v4i8()
6757 N2 = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, MVT::v4f32, in LowerSDIV_v4i16()
[all …]
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| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonISelDAGToDAG.cpp | 842 if ((IsIntrinsic->getOpcode() == ISD::INTRINSIC_WO_CHAIN)) { in SelectZeroExtend()
1244 case ISD::INTRINSIC_WO_CHAIN: in Select()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUISelLowering.cpp | 503 setTargetDAGCombine(ISD::INTRINSIC_WO_CHAIN); in AMDGPUTargetLowering()
571 case ISD::INTRINSIC_WO_CHAIN: { in hasSourceMods()
713 case ISD::INTRINSIC_WO_CHAIN: in isSDNodeAlwaysUniform()
2796 bool IsIntrin = Node24->getOpcode() == ISD::INTRINSIC_WO_CHAIN; in simplifyI24()
4108 case ISD::INTRINSIC_WO_CHAIN: in PerformDAGCombine()
4549 case ISD::INTRINSIC_WO_CHAIN: { in computeKnownBitsForTargetNode()
4676 case ISD::INTRINSIC_WO_CHAIN: { in isKnownNeverNaNForTargetNode()
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| D | SIISelLowering.cpp | 689 setOperationAction(ISD::INTRINSIC_WO_CHAIN, MVT::Other, Custom); in SITargetLowering()
690 setOperationAction(ISD::INTRINSIC_WO_CHAIN, MVT::f32, Custom); in SITargetLowering()
691 setOperationAction(ISD::INTRINSIC_WO_CHAIN, MVT::v4f32, Custom); in SITargetLowering()
692 setOperationAction(ISD::INTRINSIC_WO_CHAIN, MVT::i16, Custom); in SITargetLowering()
693 setOperationAction(ISD::INTRINSIC_WO_CHAIN, MVT::f16, Custom); in SITargetLowering()
694 setOperationAction(ISD::INTRINSIC_WO_CHAIN, MVT::v2i16, Custom); in SITargetLowering()
695 setOperationAction(ISD::INTRINSIC_WO_CHAIN, MVT::v2f16, Custom); in SITargetLowering()
4060 case ISD::INTRINSIC_WO_CHAIN: return LowerINTRINSIC_WO_CHAIN(Op, DAG); in LowerOperation()
4285 case ISD::INTRINSIC_WO_CHAIN: { in ReplaceNodeResults()
5917 ISD::INTRINSIC_WO_CHAIN, DL, MVT::f32, in LowerINTRINSIC_WO_CHAIN()
[all …]
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| /external/llvm-project/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUISelLowering.cpp | 573 setTargetDAGCombine(ISD::INTRINSIC_WO_CHAIN); in AMDGPUTargetLowering()
642 case ISD::INTRINSIC_WO_CHAIN: { in hasSourceMods()
794 case ISD::INTRINSIC_WO_CHAIN: { in isSDNodeAlwaysUniform()
2791 bool IsIntrin = Node24->getOpcode() == ISD::INTRINSIC_WO_CHAIN; in simplifyI24()
4090 case ISD::INTRINSIC_WO_CHAIN: in PerformDAGCombine()
4519 case ISD::INTRINSIC_WO_CHAIN: { in computeKnownBitsForTargetNode()
4667 case ISD::INTRINSIC_WO_CHAIN: { in isKnownNeverNaNForTargetNode()
|
| /external/llvm/lib/Target/Mips/ |
| D | MipsSEISelDAGToDAG.cpp | 831 case ISD::INTRINSIC_WO_CHAIN: { in trySelect()
|
| /external/llvm/lib/Target/PowerPC/ |
| D | PPCISelLowering.cpp | 349 setOperationAction(ISD::INTRINSIC_WO_CHAIN, MVT::Other, Custom); in PPCTargetLowering()
867 setTargetDAGCombine(ISD::INTRINSIC_WO_CHAIN); in PPCTargetLowering()
7042 return DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, DestVT, in BuildIntrinsicOp()
7052 return DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, DestVT, in BuildIntrinsicOp()
7062 return DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, DestVT, in BuildIntrinsicOp()
7186 LoadedVect = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, MVT::v4f64, in LowerBUILD_VECTOR()
7912 Value = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, MVT::v4f64, in LowerEXTRACT_VECTOR_ELT()
8119 Value = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, MVT::v4f64, in LowerVectorStore()
8293 case ISD::INTRINSIC_WO_CHAIN: return LowerINTRINSIC_WO_CHAIN(Op, DAG); in LowerOperation()
10907 case ISD::INTRINSIC_WO_CHAIN: { in PerformDAGCombine()
[all …]
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 917 setTargetDAGCombine(ISD::INTRINSIC_WO_CHAIN); in ARMTargetLowering()
1075 setOperationAction(ISD::INTRINSIC_WO_CHAIN, MVT::i64, Custom); in ARMTargetLowering()
1290 setOperationAction(ISD::INTRINSIC_WO_CHAIN, MVT::Other, Custom); in ARMTargetLowering()
6028 Res = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, DL, WidenVT, Ops); in LowerCTPOP()
8657 Y = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, MVT::v4f32, in LowerSDIV_v4i8()
8691 N2 = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, MVT::v4f32, in LowerSDIV_v4i16()
8694 N1 = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, MVT::v4f32, in LowerSDIV_v4i16()
8781 N0 = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, MVT::v8i8, in LowerUDIV()
8800 N2 = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, MVT::v4f32, in LowerUDIV()
8803 N1 = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, MVT::v4f32, in LowerUDIV()
[all …]
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| /external/llvm-project/llvm/lib/Target/Hexagon/ |
| D | HexagonISelLoweringHVX.cpp | 83 setOperationAction(ISD::INTRINSIC_WO_CHAIN, MVT::Other, Custom); in initializeHVXLowering()
307 return DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, ResTy, IntOps); in getInt()
2083 case ISD::INTRINSIC_WO_CHAIN: return LowerHvxIntrinsic(Op, DAG); in LowerHvxOperation()
|
| /external/llvm-project/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 981 setTargetDAGCombine(ISD::INTRINSIC_WO_CHAIN); in ARMTargetLowering()
1126 setOperationAction(ISD::INTRINSIC_WO_CHAIN, MVT::i64, Custom); in ARMTargetLowering()
1343 setOperationAction(ISD::INTRINSIC_WO_CHAIN, MVT::Other, Custom); in ARMTargetLowering()
6221 Res = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, DL, WidenVT, Ops); in LowerCTPOP()
8963 Y = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, MVT::v4f32, in LowerSDIV_v4i8()
8997 N2 = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, MVT::v4f32, in LowerSDIV_v4i16()
9000 N1 = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, MVT::v4f32, in LowerSDIV_v4i16()
9087 N0 = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, MVT::v8i8, in LowerUDIV()
9106 N2 = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, MVT::v4f32, in LowerUDIV()
9109 N1 = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, MVT::v4f32, in LowerUDIV()
[all …]
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/ |
| D | MipsSEISelDAGToDAG.cpp | 852 case ISD::INTRINSIC_WO_CHAIN: { in trySelect()
|