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Searched refs:IOHMC_DRAMADDRW_BANK_ADDR_WIDTH (Results 1 – 4 of 4) sorted by relevance

/external/arm-trusted-firmware/plat/intel/soc/agilex/include/
Dagilex_memory_controller.h42 #define IOHMC_DRAMADDRW_BANK_ADDR_WIDTH(x) (((x) & 0x00003c00) >> 10) macro
/external/arm-trusted-firmware/plat/intel/soc/stratix10/include/
Ds10_memory_controller.h41 #define IOHMC_DRAMADDRW_BANK_ADDR_WIDTH(x) (((x) & 0x00003c00) >> 10) macro
/external/arm-trusted-firmware/plat/intel/soc/agilex/soc/
Dagilex_memory_controller.c191 bank = IOHMC_DRAMADDRW_BANK_ADDR_WIDTH(data) + in configure_ddr_sched_ctrl_regs()
/external/arm-trusted-firmware/plat/intel/soc/stratix10/soc/
Ds10_memory_controller.c220 bank = IOHMC_DRAMADDRW_BANK_ADDR_WIDTH(data) + in configure_ddr_sched_ctrl_regs()