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Searched refs:IR3_REG_IMMED (Results 1 – 9 of 9) sorted by relevance

/external/mesa3d/src/freedreno/ir3/
Dir3.c94 if (reg->flags & IR3_REG_IMMED) { in reg()
167 if (!(src->flags & IR3_REG_IMMED)) in emit_cat1()
170 if (src->flags & IR3_REG_IMMED) { in emit_cat1()
242 IR3_REG_IMMED | IR3_REG_R | IR3_REG_HALF | in emit_cat2()
245 cat2->src1_im = !!(src1->flags & IR3_REG_IMMED); in emit_cat2()
250 iassert((src2->flags & IR3_REG_IMMED) || in emit_cat2()
269 IR3_REG_IMMED | IR3_REG_R | IR3_REG_HALF | in emit_cat2()
273 cat2->src2_im = !!(src2->flags & IR3_REG_IMMED); in emit_cat2()
423 IR3_REG_IMMED | IR3_REG_FNEG | IR3_REG_FABS | in emit_cat4()
427 cat4->src_im = !!(src->flags & IR3_REG_IMMED); in emit_cat4()
[all …]
Dir3_cp.c132 *dstflags |= srcflags & IR3_REG_IMMED; in combine_flags()
155 if (!(new_flags & IR3_REG_IMMED)) in lower_immed()
158 new_flags &= ~IR3_REG_IMMED; in lower_immed()
279 if (new_flags & IR3_REG_IMMED) { in try_swap_mad_two_srcs()
280 new_flags &= ~IR3_REG_IMMED; in try_swap_mad_two_srcs()
426 if (src_reg->flags & IR3_REG_IMMED) { in reg_cp()
547 (instr->regs[2]->flags & IR3_REG_IMMED) && in instr_cp()
591 (samp->regs[1]->flags & IR3_REG_IMMED) && in instr_cp()
593 (tex->regs[1]->flags & IR3_REG_IMMED)) { in instr_cp()
Dir3_legalize.c135 assert(inloc->flags & IR3_REG_IMMED); in legalize_block()
302 ir3_reg_create(baryf, 0, IR3_REG_IMMED)->iim_val = 0; in legalize_block()
328 ir3_reg_create(baryf, 0, IR3_REG_IMMED)->iim_val = 0; in legalize_block()
Dir3_parser.y880 immediate: integer { new_reg(0, IR3_REG_IMMED)->iim_val = $1; }
881 | '(' integer ')' { new_reg(0, IR3_REG_IMMED)->fim_val = $2; }
882 | '(' float ')' { new_reg(0, IR3_REG_IMMED)->fim_val = $2; }
883 | '(' T_NAN ')' { new_reg(0, IR3_REG_IMMED)->fim_val = NAN; }
884 | '(' T_INF ')' { new_reg(0, IR3_REG_IMMED)->fim_val = INFINITY; }
Dir3_postsched.c411 if (reg->flags & (IR3_REG_CONST | IR3_REG_IMMED)) in calculate_deps()
664 if (instr->regs[1]->flags & (IR3_REG_CONST | IR3_REG_IMMED | in is_self_mov()
Dir3.h76 IR3_REG_IMMED = 0x002, enumerator
916 debug_assert(!(reg->flags & (IR3_REG_CONST | IR3_REG_IMMED))); in writes_gpr()
968 if (r->flags & (IR3_REG_CONST | IR3_REG_IMMED)) in reg_gpr()
1382 ir3_reg_create(mov, 0, IR3_REG_IMMED | flags)->uim_val = val; in create_immed_typed()
Dir3_print.c181 if (reg->flags & IR3_REG_IMMED) { in print_reg_name()
Dir3_compiler_nir.c765 (src0->regs[1]->flags & IR3_REG_IMMED)) { in emit_intrinsic_load_ubo()
3023 compile_assert(ctx, instr->regs[1]->flags & IR3_REG_IMMED); in pack_inlocs()
/external/mesa3d/src/freedreno/ir3/tests/
Ddelay.c126 if (reg->flags & (IR3_REG_CONST | IR3_REG_IMMED)) in regs_to_ssa()