Searched refs:ISL_AUX_USAGE_HIZ_CCS_WT (Results 1 – 10 of 10) sorted by relevance
96 [ISL_AUX_USAGE_HIZ_CCS_WT] = AUX_CCS_E,317 s.DepthStencilResource = info->aux_usage == ISL_AUX_USAGE_HIZ_CCS_WT || in isl_genX()596 info->aux_usage == ISL_AUX_USAGE_HIZ_CCS_WT || in isl_genX()
644 ISL_AUX_USAGE_HIZ_CCS_WT, enumerator1810 usage == ISL_AUX_USAGE_HIZ_CCS_WT || in isl_aux_usage_has_hiz()1828 usage == ISL_AUX_USAGE_HIZ_CCS_WT || in isl_aux_usage_has_ccs()
218 info->hiz_usage == ISL_AUX_USAGE_HIZ_CCS_WT; in isl_genX()
472 case ISL_AUX_USAGE_HIZ_CCS_WT: in iris_sample_with_depth_aux()831 case ISL_AUX_USAGE_HIZ_CCS_WT: in iris_resource_texture_aux_usage()833 return ISL_AUX_USAGE_HIZ_CCS_WT; in iris_resource_texture_aux_usage()
608 case ISL_AUX_USAGE_HIZ_CCS_WT: in get_copy_region_aux_settings()
632 res->aux.possible_usages |= 1 << ISL_AUX_USAGE_HIZ_CCS_WT; in iris_resource_configure_aux()672 case ISL_AUX_USAGE_HIZ_CCS_WT: in iris_resource_configure_aux()
423 image->planes[plane].aux_usage = ISL_AUX_USAGE_HIZ_CCS_WT; in add_aux_surface_if_supported()1483 case ISL_AUX_USAGE_HIZ_CCS_WT: in anv_layout_to_aux_state()1503 case ISL_AUX_USAGE_HIZ_CCS_WT: in anv_layout_to_aux_state()
798 } else if (aux_usage == ISL_AUX_USAGE_HIZ_CCS_WT) { in blorp_can_hiz_clear_depth()
2664 params.src.aux_usage == ISL_AUX_USAGE_HIZ_CCS_WT || in blorp_copy()
2380 - intel/isl: Add a separate ISL_AUX_USAGE_HIZ_CCS_WT2382 - iris: Use ISL_AUX_USAGE_HIZ_CCS_WT to indicate write-through HiZ2383 - intel/isl: Require ISL_AUX_USAGE_HIZ_CCS_WT for HZ+CCS WT mode