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Searched refs:ISL_SURF_USAGE_DEPTH_BIT (Results 1 – 13 of 13) sorted by relevance

/external/mesa3d/src/intel/isl/
Disl.h905 #define ISL_SURF_USAGE_DEPTH_BIT (1u << 1) macro
1907 return usage & ISL_SURF_USAGE_DEPTH_BIT; in isl_surf_usage_is_depth()
1919 return (usage & ISL_SURF_USAGE_DEPTH_BIT) && in isl_surf_usage_is_depth_and_stencil()
1926 return usage & (ISL_SURF_USAGE_DEPTH_BIT | ISL_SURF_USAGE_STENCIL_BIT); in isl_surf_usage_is_depth_or_stencil()
1932 return (info->usage & ISL_SURF_USAGE_DEPTH_BIT) && in isl_surf_info_is_z16()
1939 return (info->usage & ISL_SURF_USAGE_DEPTH_BIT) && in isl_surf_info_is_z32_float()
DREADME28 buffer with the usage flags `ISL_SURF_USAGE_DEPTH_BIT` and
Disl.c1587 if ((surf_info->usage & ISL_SURF_USAGE_DEPTH_BIT) && in isl_calc_row_pitch()
2281 assert((info->depth_surf->usage & ISL_SURF_USAGE_DEPTH_BIT)); in isl_emit_depth_stencil_hiz_s()
2764 assert(surf->usage & ISL_SURF_USAGE_DEPTH_BIT); in isl_surf_get_depth_format()
/external/mesa3d/src/gallium/drivers/iris/
Diris_resolve.c767 if (res->surf.usage & ISL_SURF_USAGE_DEPTH_BIT) { in iris_resource_get_aux_state()
785 if (res->surf.usage & ISL_SURF_USAGE_DEPTH_BIT) { in iris_resource_set_aux_state()
Diris_blit.c328 if (res->surf.usage & (ISL_SURF_USAGE_DEPTH_BIT | in iris_resource_blorp_write_aux_usage()
Diris_resource.c541 ISL_SURF_USAGE_STENCIL_BIT : ISL_SURF_USAGE_DEPTH_BIT; in iris_resource_configure_main()
Diris_state.c2501 usage = ISL_SURF_USAGE_DEPTH_BIT; in iris_create_surface()
2569 if (res->surf.usage & (ISL_SURF_USAGE_DEPTH_BIT | in iris_create_surface()
3143 view.usage |= ISL_SURF_USAGE_DEPTH_BIT; in iris_set_framebuffer_state()
/external/mesa3d/src/intel/blorp/
Dblorp_blit.c1460 } else if (key->dst_usage == ISL_SURF_USAGE_DEPTH_BIT) { in brw_blorp_build_nir_shader()
1811 if (params->dst.surf.usage & ISL_SURF_USAGE_DEPTH_BIT) { in try_blorp_blit()
1820 wm_prog_key->dst_usage = ISL_SURF_USAGE_DEPTH_BIT; in try_blorp_blit()
2064 wm_prog_key->dst_usage != ISL_SURF_USAGE_DEPTH_BIT) { in try_blorp_blit()
2136 if (wm_prog_key->dst_usage == ISL_SURF_USAGE_DEPTH_BIT) { in try_blorp_blit()
2677 } else if ((params.dst.surf.usage & ISL_SURF_USAGE_DEPTH_BIT) && in blorp_copy()
/external/mesa3d/src/mesa/drivers/dri/i965/
Dbrw_misc_state.c371 view.usage |= ISL_SURF_USAGE_DEPTH_BIT; in brw_emit_depthbuffer()
Dintel_mipmap_tree.c402 mt->surf.usage & (ISL_SURF_USAGE_STENCIL_BIT | ISL_SURF_USAGE_DEPTH_BIT); in make_surface()
458 return ISL_SURF_USAGE_DEPTH_BIT | ISL_SURF_USAGE_TEXTURE_BIT; in mt_surf_usage()
460 return ISL_SURF_USAGE_DEPTH_BIT | ISL_SURF_USAGE_STENCIL_BIT | in mt_surf_usage()
/external/mesa3d/src/intel/vulkan/
Danv_image.c65 isl_usage |= ISL_SURF_USAGE_DEPTH_BIT; in choose_isl_surf_usage()
Danv_blorp.c1592 if ((src_surf.surf->usage & ISL_SURF_USAGE_DEPTH_BIT) || in anv_image_msaa_resolve()
DgenX_cmd_buffer.c5113 ISL_SURF_USAGE_DEPTH_BIT); in cmd_buffer_emit_depth_stencil()