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Searched refs:IdxN (Results 1 – 15 of 15) sorted by relevance

/external/llvm/lib/CodeGen/SelectionDAG/
DFastISel.cpp318 unsigned IdxN = getRegForValue(Idx); in getRegForGEPIndex() local
319 if (IdxN == 0) in getRegForGEPIndex()
329 IdxN = fastEmit_r(IdxVT.getSimpleVT(), PtrVT, ISD::SIGN_EXTEND, IdxN, in getRegForGEPIndex()
333 IdxN = in getRegForGEPIndex()
334 fastEmit_r(IdxVT.getSimpleVT(), PtrVT, ISD::TRUNCATE, IdxN, IdxNIsKill); in getRegForGEPIndex()
337 return std::pair<unsigned, bool>(IdxN, IdxNIsKill); in getRegForGEPIndex()
523 uint64_t IdxN = CI->getValue().sextOrTrunc(64).getSExtValue(); in selectGetElementPtr() local
524 TotalOffs += DL.getTypeAllocSize(Ty) * IdxN; in selectGetElementPtr()
545 unsigned IdxN = Pair.first; in selectGetElementPtr() local
547 if (!IdxN) // Unhandled operand. Halt "fast" selection and bail. in selectGetElementPtr()
[all …]
DSelectionDAGBuilder.cpp3350 SDValue IdxN = getValue(Idx); in visitGetElementPtr() local
3352 if (!IdxN.getValueType().isVector() && VectorWidth) { in visitGetElementPtr()
3353 MVT VT = MVT::getVectorVT(IdxN.getValueType().getSimpleVT(), VectorWidth); in visitGetElementPtr()
3354 SmallVector<SDValue, 16> Ops(VectorWidth, IdxN); in visitGetElementPtr()
3355 IdxN = DAG.getNode(ISD::BUILD_VECTOR, dl, VT, Ops); in visitGetElementPtr()
3359 IdxN = DAG.getSExtOrTrunc(IdxN, dl, N.getValueType()); in visitGetElementPtr()
3366 IdxN = DAG.getNode(ISD::SHL, dl, in visitGetElementPtr()
3367 N.getValueType(), IdxN, in visitGetElementPtr()
3368 DAG.getConstant(Amt, dl, IdxN.getValueType())); in visitGetElementPtr()
3370 SDValue Scale = DAG.getConstant(ElementSize, dl, IdxN.getValueType()); in visitGetElementPtr()
[all …]
DDAGCombiner.cpp13289 auto *IdxN = dyn_cast<ConstantSDNode>(V->getOperand(2)); in simplifyShuffleOperandRecursively() local
13290 if (!IdxN) in simplifyShuffleOperandRecursively()
13294 int Idx = IdxN->getZExtValue(); in simplifyShuffleOperandRecursively()
/external/llvm-project/llvm/lib/CodeGen/SelectionDAG/
DFastISel.cpp522 Register IdxN = getRegForValue(Idx); in getRegForGEPIndex() local
523 if (!IdxN) in getRegForGEPIndex()
533 IdxN = fastEmit_r(IdxVT.getSimpleVT(), PtrVT, ISD::SIGN_EXTEND, IdxN, in getRegForGEPIndex()
537 IdxN = in getRegForGEPIndex()
538 fastEmit_r(IdxVT.getSimpleVT(), PtrVT, ISD::TRUNCATE, IdxN, IdxNIsKill); in getRegForGEPIndex()
541 return std::pair<Register, bool>(IdxN, IdxNIsKill); in getRegForGEPIndex()
731 uint64_t IdxN = CI->getValue().sextOrTrunc(64).getSExtValue(); in selectGetElementPtr() local
732 TotalOffs += DL.getTypeAllocSize(Ty) * IdxN; in selectGetElementPtr()
753 Register IdxN = Pair.first; in selectGetElementPtr() local
755 if (!IdxN) // Unhandled operand. Halt "fast" selection and bail. in selectGetElementPtr()
[all …]
DSelectionDAGBuilder.cpp3796 SDValue IdxN = getValue(Idx); in visitGetElementPtr() local
3798 if (!IdxN.getValueType().isVector() && IsVectorGEP) { in visitGetElementPtr()
3799 EVT VT = EVT::getVectorVT(*Context, IdxN.getValueType(), in visitGetElementPtr()
3802 IdxN = DAG.getSplatVector(VT, dl, IdxN); in visitGetElementPtr()
3804 IdxN = DAG.getSplatBuildVector(VT, dl, IdxN); in visitGetElementPtr()
3809 IdxN = DAG.getSExtOrTrunc(IdxN, dl, N.getValueType()); in visitGetElementPtr()
3818 IdxN = DAG.getNode(ISD::MUL, dl, N.getValueType(), IdxN, VScale); in visitGetElementPtr()
3825 IdxN = DAG.getNode(ISD::SHL, dl, in visitGetElementPtr()
3826 N.getValueType(), IdxN, in visitGetElementPtr()
3827 DAG.getConstant(Amt, dl, IdxN.getValueType())); in visitGetElementPtr()
[all …]
/external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/
DFastISel.cpp508 unsigned IdxN = getRegForValue(Idx); in getRegForGEPIndex() local
509 if (IdxN == 0) in getRegForGEPIndex()
519 IdxN = fastEmit_r(IdxVT.getSimpleVT(), PtrVT, ISD::SIGN_EXTEND, IdxN, in getRegForGEPIndex()
523 IdxN = in getRegForGEPIndex()
524 fastEmit_r(IdxVT.getSimpleVT(), PtrVT, ISD::TRUNCATE, IdxN, IdxNIsKill); in getRegForGEPIndex()
527 return std::pair<unsigned, bool>(IdxN, IdxNIsKill); in getRegForGEPIndex()
711 uint64_t IdxN = CI->getValue().sextOrTrunc(64).getSExtValue(); in selectGetElementPtr() local
712 TotalOffs += DL.getTypeAllocSize(Ty) * IdxN; in selectGetElementPtr()
733 unsigned IdxN = Pair.first; in selectGetElementPtr() local
735 if (!IdxN) // Unhandled operand. Halt "fast" selection and bail. in selectGetElementPtr()
[all …]
DSelectionDAGBuilder.cpp3945 SDValue IdxN = getValue(Idx); in visitGetElementPtr() local
3947 if (!IdxN.getValueType().isVector() && VectorWidth) { in visitGetElementPtr()
3948 EVT VT = EVT::getVectorVT(*Context, IdxN.getValueType(), VectorWidth); in visitGetElementPtr()
3949 IdxN = DAG.getSplatBuildVector(VT, dl, IdxN); in visitGetElementPtr()
3954 IdxN = DAG.getSExtOrTrunc(IdxN, dl, N.getValueType()); in visitGetElementPtr()
3961 IdxN = DAG.getNode(ISD::SHL, dl, in visitGetElementPtr()
3962 N.getValueType(), IdxN, in visitGetElementPtr()
3963 DAG.getConstant(Amt, dl, IdxN.getValueType())); in visitGetElementPtr()
3966 IdxN.getValueType()); in visitGetElementPtr()
3967 IdxN = DAG.getNode(ISD::MUL, dl, in visitGetElementPtr()
[all …]
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/
DHexagonISelLoweringHVX.cpp391 auto *IdxN = dyn_cast<ConstantSDNode>(SplatV.getNode()); in buildHvxVectorReg() local
392 if (IdxN && IdxN->isNullValue()) in buildHvxVectorReg()
925 auto *IdxN = dyn_cast<ConstantSDNode>(IdxV.getNode()); in insertHvxSubvectorReg() local
926 if (!IdxN || !IdxN->isNullValue()) { in insertHvxSubvectorReg()
949 if (RolBase != 4 || !IdxN || !IdxN->isNullValue()) { in insertHvxSubvectorReg()
985 auto *IdxN = dyn_cast<ConstantSDNode>(IdxV.getNode()); in insertHvxSubvectorPred() local
986 if (!IdxN || !IdxN->isNullValue()) { in insertHvxSubvectorPred()
1000 if (!IdxN || !IdxN->isNullValue()) { in insertHvxSubvectorPred()
DHexagonISelLowering.cpp2336 auto *IdxN = dyn_cast<ConstantSDNode>(IdxV); in extractVector() local
2344 if (IdxN) { in extractVector()
2348 if (IdxN->isNullValue() && ValTy.getSizeInBits() == 1) in extractVector()
2394 if (IdxN) { in extractVector()
2395 unsigned Off = IdxN->getZExtValue() * ElemWidth; in extractVector()
/external/llvm-project/llvm/lib/Target/Hexagon/
DHexagonISelLoweringHVX.cpp515 auto *IdxN = dyn_cast<ConstantSDNode>(SplatV.getNode()); in buildHvxVectorReg() local
516 if (IdxN && IdxN->isNullValue()) in buildHvxVectorReg()
1055 auto *IdxN = dyn_cast<ConstantSDNode>(IdxV.getNode()); in insertHvxSubvectorReg() local
1056 if (!IdxN || !IdxN->isNullValue()) { in insertHvxSubvectorReg()
1079 if (RolBase != 4 || !IdxN || !IdxN->isNullValue()) { in insertHvxSubvectorReg()
1115 auto *IdxN = dyn_cast<ConstantSDNode>(IdxV.getNode()); in insertHvxSubvectorPred() local
1116 if (!IdxN || !IdxN->isNullValue()) { in insertHvxSubvectorPred()
1131 if (!IdxN || !IdxN->isNullValue()) { in insertHvxSubvectorPred()
DHexagonISelLowering.cpp2482 auto *IdxN = dyn_cast<ConstantSDNode>(IdxV); in extractVector() local
2490 if (IdxN) { in extractVector()
2494 if (IdxN->isNullValue() && ValTy.getSizeInBits() == 1) in extractVector()
2540 if (IdxN) { in extractVector()
2541 unsigned Off = IdxN->getZExtValue() * ElemWidth; in extractVector()
/external/llvm-project/llvm/lib/Transforms/InstCombine/
DInstCombineCalls.cpp1669 unsigned IdxN = cast<ConstantInt>(Idx)->getZExtValue(); in visitCallInst() local
1673 if (IdxN % SubVecNumElts != 0 || IdxN + SubVecNumElts > VecNumElts) { in visitCallInst()
1699 for (unsigned i = 0; i != IdxN; ++i) in visitCallInst()
1703 for (unsigned i = IdxN + SubVecNumElts; i != DstNumElts; ++i) in visitCallInst()
1724 unsigned IdxN = cast<ConstantInt>(Idx)->getZExtValue(); in visitCallInst() local
1729 if (IdxN % DstNumElts != 0 || IdxN + DstNumElts > VecNumElts) { in visitCallInst()
1742 Mask.push_back(IdxN + i); in visitCallInst()
/external/llvm/lib/Target/AArch64/
DAArch64FastISel.cpp4819 unsigned IdxN = getRegForValue(Idx); in getRegForGEPIndex() local
4820 if (IdxN == 0) in getRegForGEPIndex()
4830 IdxN = emitIntExt(IdxVT.getSimpleVT(), IdxN, PtrVT, /*IsZExt=*/false); in getRegForGEPIndex()
4834 return std::pair<unsigned, bool>(IdxN, IdxNIsKill); in getRegForGEPIndex()
4882 unsigned IdxN = Pair.first; in selectGetElementPtr() local
4884 if (!IdxN) in selectGetElementPtr()
4891 IdxN = emitMul_rr(VT, IdxN, IdxNIsKill, C, true); in selectGetElementPtr()
4892 if (!IdxN) in selectGetElementPtr()
4896 N = fastEmit_rr(VT, VT, ISD::ADD, N, NIsKill, IdxN, IdxNIsKill); in selectGetElementPtr()
/external/llvm-project/llvm/lib/Target/AArch64/
DAArch64FastISel.cpp4991 unsigned IdxN = getRegForValue(Idx); in getRegForGEPIndex() local
4992 if (IdxN == 0) in getRegForGEPIndex()
5002 IdxN = emitIntExt(IdxVT.getSimpleVT(), IdxN, PtrVT, /*isZExt=*/false); in getRegForGEPIndex()
5006 return std::pair<unsigned, bool>(IdxN, IdxNIsKill); in getRegForGEPIndex()
5057 unsigned IdxN = Pair.first; in selectGetElementPtr() local
5059 if (!IdxN) in selectGetElementPtr()
5066 IdxN = emitMul_rr(VT, IdxN, IdxNIsKill, C, true); in selectGetElementPtr()
5067 if (!IdxN) in selectGetElementPtr()
5071 N = fastEmit_rr(VT, VT, ISD::ADD, N, NIsKill, IdxN, IdxNIsKill); in selectGetElementPtr()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/
DAArch64FastISel.cpp4998 unsigned IdxN = getRegForValue(Idx); in getRegForGEPIndex() local
4999 if (IdxN == 0) in getRegForGEPIndex()
5009 IdxN = emitIntExt(IdxVT.getSimpleVT(), IdxN, PtrVT, /*isZExt=*/false); in getRegForGEPIndex()
5013 return std::pair<unsigned, bool>(IdxN, IdxNIsKill); in getRegForGEPIndex()
5064 unsigned IdxN = Pair.first; in selectGetElementPtr() local
5066 if (!IdxN) in selectGetElementPtr()
5073 IdxN = emitMul_rr(VT, IdxN, IdxNIsKill, C, true); in selectGetElementPtr()
5074 if (!IdxN) in selectGetElementPtr()
5078 N = fastEmit_rr(VT, VT, ISD::ADD, N, NIsKill, IdxN, IdxNIsKill); in selectGetElementPtr()