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Searched refs:Imm4 (Results 1 – 6 of 6) sorted by relevance

/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/AsmParser/
DHexagonAsmParser.cpp1619 MCOperand &Imm4 = Inst.getOperand(3); in processInstruction() local
1629 TmpInst.addOperand(Imm4); in processInstruction()
1639 MCOperand &Imm4 = Inst.getOperand(3); in processInstruction() local
1649 TmpInst.addOperand(Imm4); in processInstruction()
1659 MCOperand &Imm4 = Inst.getOperand(3); in processInstruction() local
1669 TmpInst.addOperand(Imm4); in processInstruction()
/external/llvm/lib/Target/Hexagon/AsmParser/
DHexagonAsmParser.cpp1845 MCOperand &Imm4 = Inst.getOperand(3); in processInstruction() local
1853 TmpInst.addOperand(Imm4); in processInstruction()
1864 MCOperand &Imm4 = Inst.getOperand(3); in processInstruction() local
1872 TmpInst.addOperand(Imm4); in processInstruction()
1883 MCOperand &Imm4 = Inst.getOperand(3); in processInstruction() local
1891 TmpInst.addOperand(Imm4); in processInstruction()
/external/llvm-project/llvm/lib/Target/Hexagon/AsmParser/
DHexagonAsmParser.cpp1631 MCOperand &Imm4 = Inst.getOperand(3); in processInstruction() local
1641 TmpInst.addOperand(Imm4); in processInstruction()
1651 MCOperand &Imm4 = Inst.getOperand(3); in processInstruction() local
1661 TmpInst.addOperand(Imm4); in processInstruction()
1671 MCOperand &Imm4 = Inst.getOperand(3); in processInstruction() local
1681 TmpInst.addOperand(Imm4); in processInstruction()
/external/swiftshader/third_party/subzero/src/
DIceAssemblerARM32.cpp3441 IValueT Imm4 = 0; in vdup() local
3447 Imm4 = 1 | ((Idx & 0x7) << 1); in vdup()
3452 Imm4 = 2 | ((Idx & 0x3) << 2); in vdup()
3458 Imm4 = 4 | ((Idx & 0x1) << 3); in vdup()
3465 emitSIMDBase(VdupOpcode, Dd, Imm4, Dn + (Lower ? 0 : 1), UseQRegs, IsFloatTy); in vdup()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/
DHexagonPatterns.td2439 // First, match the unusual case of doubleword store into Reg+Imm4, i.e.
2440 // a store where the offset Imm4 is a multiple of 4, but not of 8. This
/external/llvm-project/llvm/lib/Target/Hexagon/
DHexagonPatterns.td2492 // First, match the unusual case of doubleword store into Reg+Imm4, i.e.
2493 // a store where the offset Imm4 is a multiple of 4, but not of 8. This