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Searched refs:IncomingReg (Results 1 – 15 of 15) sorted by relevance

/external/llvm/lib/CodeGen/
DPHIElimination.cpp239 unsigned IncomingReg = 0; in LowerPHINode() local
257 IncomingReg = entry; in LowerPHINode()
260 DEBUG(dbgs() << "Reusing " << PrintReg(IncomingReg) << " for " << *MPhi); in LowerPHINode()
263 entry = IncomingReg = MF.getRegInfo().createVirtualRegister(RC); in LowerPHINode()
267 .addReg(IncomingReg); in LowerPHINode()
274 if (IncomingReg) { in LowerPHINode()
275 LiveVariables::VarInfo &VI = LV->getVarInfo(IncomingReg); in LowerPHINode()
278 LV->setPHIJoin(IncomingReg); in LowerPHINode()
286 LV->removeVirtualRegisterKilled(IncomingReg, *OldKill); in LowerPHINode()
294 LV->addVirtualRegisterKilled(IncomingReg, PHICopy); in LowerPHINode()
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DMachineInstr.cpp1940 bool MachineInstr::addRegisterKilled(unsigned IncomingReg, in addRegisterKilled() argument
1943 bool isPhysReg = TargetRegisterInfo::isPhysicalRegister(IncomingReg); in addRegisterKilled()
1945 MCRegAliasIterator(IncomingReg, RegInfo, false).isValid(); in addRegisterKilled()
1963 if (Reg == IncomingReg) { in addRegisterKilled()
1977 if (RegInfo->isSuperRegister(IncomingReg, Reg)) in addRegisterKilled()
1979 if (RegInfo->isSubRegister(IncomingReg, Reg)) in addRegisterKilled()
1997 addOperand(MachineOperand::CreateReg(IncomingReg, in addRegisterKilled()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/
DPHIElimination.cpp256 unsigned IncomingReg = 0; in LowerPHINode() local
275 IncomingReg = entry; in LowerPHINode()
278 LLVM_DEBUG(dbgs() << "Reusing " << printReg(IncomingReg) << " for " in LowerPHINode()
282 entry = IncomingReg = MF.getRegInfo().createVirtualRegister(RC); in LowerPHINode()
286 IncomingReg, DestReg); in LowerPHINode()
291 if (IncomingReg) { in LowerPHINode()
292 LiveVariables::VarInfo &VI = LV->getVarInfo(IncomingReg); in LowerPHINode()
295 LV->setPHIJoin(IncomingReg); in LowerPHINode()
303 LV->removeVirtualRegisterKilled(IncomingReg, *OldKill); in LowerPHINode()
311 LV->addVirtualRegisterKilled(IncomingReg, *PHICopy); in LowerPHINode()
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DMachineInstr.cpp1785 bool MachineInstr::addRegisterKilled(Register IncomingReg, in addRegisterKilled() argument
1788 bool isPhysReg = Register::isPhysicalRegister(IncomingReg); in addRegisterKilled()
1790 MCRegAliasIterator(IncomingReg, RegInfo, false).isValid(); in addRegisterKilled()
1808 if (Reg == IncomingReg) { in addRegisterKilled()
1821 if (RegInfo->isSuperRegister(IncomingReg, Reg)) in addRegisterKilled()
1823 if (RegInfo->isSubRegister(IncomingReg, Reg)) in addRegisterKilled()
1842 addOperand(MachineOperand::CreateReg(IncomingReg, in addRegisterKilled()
/external/llvm-project/llvm/lib/CodeGen/
DPHIElimination.cpp286 unsigned IncomingReg = 0; in LowerPHINode() local
305 IncomingReg = entry; in LowerPHINode()
308 LLVM_DEBUG(dbgs() << "Reusing " << printReg(IncomingReg) << " for " in LowerPHINode()
312 entry = IncomingReg = MF.getRegInfo().createVirtualRegister(RC); in LowerPHINode()
316 IncomingReg, DestReg); in LowerPHINode()
321 if (IncomingReg) { in LowerPHINode()
322 LiveVariables::VarInfo &VI = LV->getVarInfo(IncomingReg); in LowerPHINode()
325 LV->setPHIJoin(IncomingReg); in LowerPHINode()
353 LV->removeVirtualRegisterKilled(IncomingReg, *OldKill); in LowerPHINode()
363 LV->addVirtualRegisterKilled(IncomingReg, *PHICopy); in LowerPHINode()
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DMachineInstr.cpp1877 bool MachineInstr::addRegisterKilled(Register IncomingReg, in addRegisterKilled() argument
1880 bool isPhysReg = Register::isPhysicalRegister(IncomingReg); in addRegisterKilled()
1882 MCRegAliasIterator(IncomingReg, RegInfo, false).isValid(); in addRegisterKilled()
1900 if (Reg == IncomingReg) { in addRegisterKilled()
1913 if (RegInfo->isSuperRegister(IncomingReg, Reg)) in addRegisterKilled()
1915 if (RegInfo->isSubRegister(IncomingReg, Reg)) in addRegisterKilled()
1934 addOperand(MachineOperand::CreateReg(IncomingReg, in addRegisterKilled()
/external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/
DLiveVariables.h201 void addVirtualRegisterKilled(unsigned IncomingReg, MachineInstr &MI,
203 if (MI.addRegisterKilled(IncomingReg, TRI, AddIfNotFound))
204 getVarInfo(IncomingReg).Kills.push_back(&MI);
237 void addVirtualRegisterDead(unsigned IncomingReg, MachineInstr &MI,
239 if (MI.addRegisterDead(IncomingReg, TRI, AddIfNotFound))
240 getVarInfo(IncomingReg).Kills.push_back(&MI);
DMachineInstr.h1401 bool addRegisterKilled(Register IncomingReg,
/external/llvm-project/llvm/include/llvm/CodeGen/
DLiveVariables.h200 void addVirtualRegisterKilled(Register IncomingReg, MachineInstr &MI,
202 if (MI.addRegisterKilled(IncomingReg, TRI, AddIfNotFound))
203 getVarInfo(IncomingReg).Kills.push_back(&MI);
236 void addVirtualRegisterDead(Register IncomingReg, MachineInstr &MI,
238 if (MI.addRegisterDead(IncomingReg, TRI, AddIfNotFound))
239 getVarInfo(IncomingReg).Kills.push_back(&MI);
DMachineInstr.h1513 bool addRegisterKilled(Register IncomingReg,
/external/llvm/include/llvm/CodeGen/
DLiveVariables.h202 void addVirtualRegisterKilled(unsigned IncomingReg, MachineInstr &MI,
204 if (MI.addRegisterKilled(IncomingReg, TRI, AddIfNotFound))
205 getVarInfo(IncomingReg).Kills.push_back(&MI);
238 void addVirtualRegisterDead(unsigned IncomingReg, MachineInstr &MI,
240 if (MI.addRegisterDead(IncomingReg, TRI, AddIfNotFound))
241 getVarInfo(IncomingReg).Kills.push_back(&MI);
DMachineInstr.h1080 bool addRegisterKilled(unsigned IncomingReg,
/external/llvm-project/llvm/lib/Target/AMDGPU/
DSILowerI1Copies.cpp581 Register IncomingReg = MI->getOperand(i).getReg(); in lowerPhis() local
583 MachineInstr *IncomingDef = MRI->getUniqueVRegDef(IncomingReg); in lowerPhis()
586 IncomingReg = IncomingDef->getOperand(1).getReg(); in lowerPhis()
587 assert(isLaneMaskReg(IncomingReg) || isVreg1(IncomingReg)); in lowerPhis()
592 assert(IncomingDef->isPHI() || PhiRegisters.count(IncomingReg)); in lowerPhis()
596 IncomingRegs.push_back(IncomingReg); in lowerPhis()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DSILowerI1Copies.cpp577 Register IncomingReg = MI->getOperand(i).getReg(); in lowerPhis() local
579 MachineInstr *IncomingDef = MRI->getUniqueVRegDef(IncomingReg); in lowerPhis()
582 IncomingReg = IncomingDef->getOperand(1).getReg(); in lowerPhis()
583 assert(isLaneMaskReg(IncomingReg) || isVreg1(IncomingReg)); in lowerPhis()
588 assert(IncomingDef->isPHI() || PhiRegisters.count(IncomingReg)); in lowerPhis()
592 IncomingRegs.push_back(IncomingReg); in lowerPhis()
/external/llvm/lib/Target/AMDGPU/
DSIISelLowering.cpp1108 unsigned IncomingReg = MI.getOperand(I).getReg(); in splitKillBlock() local
1111 if (SplitDefRegs.count(IncomingReg)) in splitKillBlock()