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Searched refs:InstName (Results 1 – 21 of 21) sorted by relevance

/external/llvm-project/polly/lib/Transform/
DRewriteByReferenceParameters.cpp66 std::string InstName = Alloca->getName().str(); in tryRewriteInstruction() local
70 "polly_byref_alloca_" + InstName, &*Entry->begin()); in tryRewriteInstruction()
73 "polly_byref_load_" + InstName, &Inst); in tryRewriteInstruction()
77 "polly_byref_cast_" + InstName, &Inst); in tryRewriteInstruction()
/external/swiftshader/third_party/subzero/src/
DIceAssemblerARM32.cpp541 const char *RegName, const char *InstName) { in encodeRegister() argument
544 llvm::report_fatal_error(std::string(InstName) + ": Can't find register " + in encodeRegister()
550 const char *InstName) { in encodeGPRegister() argument
551 return encodeRegister(OpReg, WantGPRegs, RegName, InstName); in encodeGPRegister()
555 const char *InstName) { in encodeSRegister() argument
556 return encodeRegister(OpReg, WantSRegs, RegName, InstName); in encodeSRegister()
560 const char *InstName) { in encodeDRegister() argument
561 return encodeRegister(OpReg, WantDRegs, RegName, InstName); in encodeDRegister()
565 const char *InstName) { in encodeQRegister() argument
566 return encodeRegister(OpReg, WantQRegs, RegName, InstName); in encodeQRegister()
[all …]
DIceAssemblerARM32.h725 EmitChecks RuleChecks, const char *InstName);
731 EmitChecks RuleChecks, const char *InstName);
737 EmitChecks RuleChecks, const char *InstName);
751 const Operand *OpRm, const char *InstName);
756 const char *InstName);
761 const char *InstName);
767 const TargetInfo &TInfo, const char *InstName);
793 const char *InstName);
798 size_t ElmtSize, IValueT Align, const char *InstName);
810 const char *InstName);
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DIceAssemblerMIPS32.cpp164 const char *RegName, const char *InstName) { in encodeRegister() argument
167 llvm::report_fatal_error(std::string(InstName) + ": Can't find register " + in encodeRegister()
173 const char *InstName) { in encodeGPRegister() argument
174 return encodeRegister(OpReg, WantGPRegs, RegName, InstName); in encodeGPRegister()
178 const char *InstName) { in encodeFPRegister() argument
179 return encodeRegister(OpReg, WantFPRegs, RegName, InstName); in encodeFPRegister()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/MC/
DMCInst.cpp74 StringRef InstName = Printer ? Printer->getOpcodeName(getOpcode()) : ""; in dump_pretty() local
75 dump_pretty(OS, InstName, Separator); in dump_pretty()
/external/llvm-project/llvm/lib/MC/
DMCInst.cpp74 StringRef InstName = Printer ? Printer->getOpcodeName(getOpcode()) : ""; in dump_pretty() local
75 dump_pretty(OS, InstName, Separator); in dump_pretty()
/external/llvm/utils/TableGen/
DCodeEmitterGen.cpp271 const std::string &InstName = R->getValueAsString("Namespace") + "::" in run() local
275 CaseMap[Case].push_back(InstName); in run()
DCodeGenSchedule.cpp533 std::string InstName = Inst->TheDef->getName(); in collectSchedClasses() local
548 dbgs() << "Itinerary for " << InstName << ": " in collectSchedClasses()
553 dbgs() << "SchedRW machine model for " << InstName; in collectSchedClasses()
566 dbgs() << "InstRW on " << ProcModel.ModelName << " for " << InstName; in collectSchedClasses()
DCodeGenDAGPatterns.cpp1682 StringRef InstName, in emitTooManyOperandsError() argument
1685 TP.error("Instruction '" + InstName + "' was provided " + Twine(Actual) + in emitTooManyOperandsError()
1690 StringRef InstName, in emitTooFewOperandsError() argument
1692 TP.error("Instruction '" + InstName + in emitTooFewOperandsError()
/external/llvm-project/llvm/lib/Target/WebAssembly/AsmParser/
DWebAssemblyAsmParser.cpp409 bool checkForP2AlignIfLoadStore(OperandVector &Operands, StringRef InstName) { in checkForP2AlignIfLoadStore() argument
411 auto IsLoadStore = InstName.find(".load") != StringRef::npos || in checkForP2AlignIfLoadStore()
412 InstName.find(".store") != StringRef::npos; in checkForP2AlignIfLoadStore()
413 auto IsAtomic = InstName.find("atomic.") != StringRef::npos; in checkForP2AlignIfLoadStore()
429 auto IsLoadStoreLane = InstName.find("_lane") != StringRef::npos; in checkForP2AlignIfLoadStore()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/WebAssembly/AsmParser/
DWebAssemblyAsmParser.cpp389 bool checkForP2AlignIfLoadStore(OperandVector &Operands, StringRef InstName) { in checkForP2AlignIfLoadStore() argument
391 auto IsLoadStore = InstName.find(".load") != StringRef::npos || in checkForP2AlignIfLoadStore()
392 InstName.find(".store") != StringRef::npos; in checkForP2AlignIfLoadStore()
393 auto IsAtomic = InstName.find("atomic.") != StringRef::npos; in checkForP2AlignIfLoadStore()
/external/llvm-project/clang/include/clang/Basic/
Darm_neon.td353 let InstName = "vcge" in
356 let InstName = "vcgt" in
358 let InstName = "vacge" in {
362 let InstName = "vacgt" in {
507 let InstName = "vmov" in
513 let InstName = "vmov" in
525 let InstName = "vmov" in {
533 let InstName = "" in
548 let InstName = "vmov" in {
577 let InstName = "vtbl" in {
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Darm_neon_incl.td283 string InstName = "";
/external/llvm-project/llvm/utils/TableGen/
DCodeGenSchedule.cpp121 StringRef InstName = Inst->TheDef->getName(); in apply() local
122 if (InstName.startswith(Prefix) && in apply()
123 (!Regexpr || Regexpr->match(InstName.substr(Prefix.size())))) { in apply()
149 StringRef InstName = Inst->TheDef->getName(); in apply() local
150 if (!Regexpr || Regexpr->match(InstName.substr(Prefix.size()))) { in apply()
900 StringRef InstName = Inst->TheDef->getName(); in collectSchedClasses() local
917 dbgs() << "Itinerary for " << InstName << ": " in collectSchedClasses()
923 dbgs() << "SchedRW machine model for " << InstName; in collectSchedClasses()
938 << InstName); in collectSchedClasses()
DCodeEmitterGen.cpp470 std::string InstName = in run() local
474 CaseMap[Case].push_back(std::move(InstName)); in run()
DGlobalISelEmitter.cpp4944 StringRef InstName = Inst.TheDef->getName(); in inferRegClassFromPattern() local
4945 bool IsRegSequence = InstName == "REG_SEQUENCE"; in inferRegClassFromPattern()
4946 if (IsRegSequence || InstName == "COPY_TO_REGCLASS") { in inferRegClassFromPattern()
4954 if (InstName == "INSERT_SUBREG") { in inferRegClassFromPattern()
4960 if (InstName == "EXTRACT_SUBREG") { in inferRegClassFromPattern()
DCodeGenDAGPatterns.cpp2346 StringRef InstName, in emitTooManyOperandsError() argument
2349 TP.error("Instruction '" + InstName + "' was provided " + Twine(Actual) + in emitTooManyOperandsError()
2354 StringRef InstName, in emitTooFewOperandsError() argument
2356 TP.error("Instruction '" + InstName + in emitTooFewOperandsError()
/external/clang/include/clang/Basic/
Darm_neon.td277 string InstName = "";
553 let InstName = "vcge" in
556 let InstName = "vcgt" in
558 let InstName = "vacge" in {
562 let InstName = "vacgt" in {
662 let InstName = "vmov" in
668 let InstName = "vmov" in
680 let InstName = "vmov" in {
688 let InstName = "" in
699 let InstName = "vmov" in {
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/external/clang/lib/Sema/
DTreeTransform.h914 TemplateName InstName in RebuildDependentTemplateSpecializationType() local
918 if (InstName.isNull()) in RebuildDependentTemplateSpecializationType()
922 if (InstName.getAsDependentTemplateName()) in RebuildDependentTemplateSpecializationType()
931 getDerived().RebuildTemplateSpecializationType(InstName, NameLoc, Args); in RebuildDependentTemplateSpecializationType()
/external/llvm-project/clang/lib/Sema/
DTreeTransform.h1049 TemplateName InstName = getDerived().RebuildTemplateName( in RebuildDependentTemplateSpecializationType() local
1053 if (InstName.isNull()) in RebuildDependentTemplateSpecializationType()
1057 if (InstName.getAsDependentTemplateName()) in RebuildDependentTemplateSpecializationType()
1066 getDerived().RebuildTemplateSpecializationType(InstName, NameLoc, Args); in RebuildDependentTemplateSpecializationType()
/external/llvm/lib/Target/X86/
DX86InstrAVX512.td2219 multiclass avx512_mask_unop_int<string IntName, string InstName> {
2223 (COPY_TO_REGCLASS (!cast<Instruction>(InstName##"Wrr")
2285 multiclass avx512_mask_binop_int<string IntName, string InstName> {
2289 (COPY_TO_REGCLASS (!cast<Instruction>(InstName##"Wrr")