Home
last modified time | relevance | path

Searched refs:IntID (Results 1 – 25 of 43) sorted by relevance

12

/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/
DHexagonMapAsm2IntrinV62.gen.td9 multiclass T_VR_HVX_gen_pat <InstHexagon MI, Intrinsic IntID> {
10 def: Pat<(IntID HvxVR:$src1, IntRegs:$src2),
12 def: Pat<(!cast<Intrinsic>(IntID#"_128B") HvxVR:$src1, IntRegs:$src2),
16 multiclass T_VVL_HVX_gen_pat <InstHexagon MI, Intrinsic IntID> {
17 def: Pat<(IntID HvxVR:$src1, HvxVR:$src2, IntRegsLow8:$src3),
19 def: Pat<(!cast<Intrinsic>(IntID#"_128B") HvxVR:$src1, HvxVR:$src2,
24 multiclass T_VV_HVX_gen_pat <InstHexagon MI, Intrinsic IntID> {
25 def: Pat<(IntID HvxVR:$src1, HvxVR:$src2),
27 def: Pat<(!cast<Intrinsic>(IntID#"_128B") HvxVR:$src1, HvxVR:$src2),
31 multiclass T_WW_HVX_gen_pat <InstHexagon MI, Intrinsic IntID> {
[all …]
DHexagonIntrinsicsV60.td84 multiclass T_R_pat <InstHexagon MI, Intrinsic IntID> {
85 def: Pat<(IntID IntRegs:$src1), (MI IntRegs:$src1)>;
86 def: Pat<(!cast<Intrinsic>(IntID#"_128B") IntRegs:$src1),
90 multiclass T_V_pat <InstHexagon MI, Intrinsic IntID> {
91 def: Pat<(IntID HvxVR:$src1),
94 def: Pat<(!cast<Intrinsic>(IntID#"_128B") HvxVR:$src1),
98 multiclass T_W_pat <InstHexagon MI, Intrinsic IntID> {
99 def: Pat<(IntID HvxWR:$src1),
102 def: Pat<(!cast<Intrinsic>(IntID#"_128B") HvxWR:$src1),
106 multiclass T_Q_pat <InstHexagon MI, Intrinsic IntID> {
[all …]
DHexagonIntrinsics.td11 class T_R_pat <InstHexagon MI, Intrinsic IntID>
12 : Pat <(IntID I32:$Rs),
15 class T_RR_pat <InstHexagon MI, Intrinsic IntID>
16 : Pat <(IntID I32:$Rs, I32:$Rt),
19 class T_RP_pat <InstHexagon MI, Intrinsic IntID>
20 : Pat <(IntID I32:$Rs, I64:$Rt),
143 class S2op_tableidx_pat <Intrinsic IntID, InstHexagon OutputInst,
145 : Pat <(IntID I32:$src1, I32:$src2, u4_0ImmPred_timm:$src3, u5_0ImmPred_timm:$src4),
186 class T_stb_pat <InstHexagon MI, Intrinsic IntID, PatLeaf Val>
187 : Pat<(IntID I32:$Rs, Val:$Rt, I32:$Ru),
[all …]
DHexagonOptimizeSZextends.cpp47 bool intrinsicAlreadySextended(Intrinsic::ID IntID);
56 bool HexagonOptimizeSZextends::intrinsicAlreadySextended(Intrinsic::ID IntID) { in intrinsicAlreadySextended() argument
57 switch(IntID) { in intrinsicAlreadySextended()
/external/llvm-project/llvm/lib/Target/Hexagon/
DHexagonMapAsm2IntrinV62.gen.td9 multiclass T_VR_HVX_gen_pat <InstHexagon MI, Intrinsic IntID> {
10 def: Pat<(IntID HvxVR:$src1, IntRegs:$src2),
12 def: Pat<(!cast<Intrinsic>(IntID#"_128B") HvxVR:$src1, IntRegs:$src2),
16 multiclass T_VVL_HVX_gen_pat <InstHexagon MI, Intrinsic IntID> {
17 def: Pat<(IntID HvxVR:$src1, HvxVR:$src2, IntRegsLow8:$src3),
19 def: Pat<(!cast<Intrinsic>(IntID#"_128B") HvxVR:$src1, HvxVR:$src2,
24 multiclass T_VV_HVX_gen_pat <InstHexagon MI, Intrinsic IntID> {
25 def: Pat<(IntID HvxVR:$src1, HvxVR:$src2),
27 def: Pat<(!cast<Intrinsic>(IntID#"_128B") HvxVR:$src1, HvxVR:$src2),
31 multiclass T_WW_HVX_gen_pat <InstHexagon MI, Intrinsic IntID> {
[all …]
DHexagonIntrinsicsV60.td84 multiclass T_R_pat <InstHexagon MI, Intrinsic IntID> {
85 def: Pat<(IntID IntRegs:$src1), (MI IntRegs:$src1)>;
86 def: Pat<(!cast<Intrinsic>(IntID#"_128B") IntRegs:$src1),
90 multiclass T_V_pat <InstHexagon MI, Intrinsic IntID> {
91 def: Pat<(IntID HvxVR:$src1),
94 def: Pat<(!cast<Intrinsic>(IntID#"_128B") HvxVR:$src1),
98 multiclass T_W_pat <InstHexagon MI, Intrinsic IntID> {
99 def: Pat<(IntID HvxWR:$src1),
102 def: Pat<(!cast<Intrinsic>(IntID#"_128B") HvxWR:$src1),
106 multiclass T_Q_pat <InstHexagon MI, Intrinsic IntID> {
[all …]
DHexagonIntrinsics.td11 class T_R_pat <InstHexagon MI, Intrinsic IntID>
12 : Pat <(IntID I32:$Rs),
15 class T_RR_pat <InstHexagon MI, Intrinsic IntID>
16 : Pat <(IntID I32:$Rs, I32:$Rt),
19 class T_RP_pat <InstHexagon MI, Intrinsic IntID>
20 : Pat <(IntID I32:$Rs, I64:$Rt),
143 class S2op_tableidx_pat <Intrinsic IntID, InstHexagon OutputInst,
145 : Pat <(IntID I32:$src1, I32:$src2, u4_0ImmPred_timm:$src3, u5_0ImmPred_timm:$src4),
186 class T_stb_pat <InstHexagon MI, Intrinsic IntID, PatLeaf Val>
187 : Pat<(IntID I32:$Rs, Val:$Rt, I32:$Ru),
[all …]
DHexagonOptimizeSZextends.cpp47 bool intrinsicAlreadySextended(Intrinsic::ID IntID);
56 bool HexagonOptimizeSZextends::intrinsicAlreadySextended(Intrinsic::ID IntID) { in intrinsicAlreadySextended() argument
57 switch(IntID) { in intrinsicAlreadySextended()
/external/llvm/lib/Target/Hexagon/
DHexagonIntrinsicsV60.td189 multiclass T_R_pat <InstHexagon MI, Intrinsic IntID> {
190 def: Pat<(IntID IntRegs:$src1), (MI IntRegs:$src1)>,
192 def: Pat<(!cast<Intrinsic>(IntID#"_128B") IntRegs:$src1),
197 multiclass T_V_pat <InstHexagon MI, Intrinsic IntID> {
198 def: Pat<(IntID VectorRegs:$src1),
202 def: Pat<(!cast<Intrinsic>(IntID#"_128B") VectorRegs128B:$src1),
207 multiclass T_Q_pat <InstHexagon MI, Intrinsic IntID> {
208 def: Pat<(IntID VecPredRegs:$src1),
212 def: Pat<(!cast<Intrinsic>(IntID#"_128B") VecPredRegs128B:$src1),
217 multiclass T_WR_pat <InstHexagon MI, Intrinsic IntID> {
[all …]
DHexagonIntrinsics.td16 class T_I_pat <InstHexagon MI, Intrinsic IntID>
17 : Pat <(IntID imm:$Is),
20 class T_R_pat <InstHexagon MI, Intrinsic IntID>
21 : Pat <(IntID I32:$Rs),
24 class T_P_pat <InstHexagon MI, Intrinsic IntID>
25 : Pat <(IntID I64:$Rs),
28 class T_II_pat <InstHexagon MI, Intrinsic IntID, PatFrag Imm1, PatFrag Imm2>
29 : Pat<(IntID Imm1:$Is, Imm2:$It),
32 class T_RI_pat <InstHexagon MI, Intrinsic IntID,
34 : Pat<(IntID I32:$Rs, ImmPred:$It),
[all …]
DHexagonOptimizeSZextends.cpp52 bool intrinsicAlreadySextended(Intrinsic::ID IntID);
61 bool HexagonOptimizeSZextends::intrinsicAlreadySextended(Intrinsic::ID IntID) { in intrinsicAlreadySextended() argument
62 switch(IntID) { in intrinsicAlreadySextended()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Transforms/ObjCARC/
DARCRuntimeEntryPoints.h134 Function *getIntrinsicEntryPoint(Function *&Decl, Intrinsic::ID IntID) { in getIntrinsicEntryPoint() argument
138 return Decl = Intrinsic::getDeclaration(TheModule, IntID); in getIntrinsicEntryPoint()
/external/llvm-project/llvm/lib/Transforms/ObjCARC/
DARCRuntimeEntryPoints.h130 Function *getIntrinsicEntryPoint(Function *&Decl, Intrinsic::ID IntID) { in getIntrinsicEntryPoint() argument
134 return Decl = Intrinsic::getDeclaration(TheModule, IntID); in getIntrinsicEntryPoint()
/external/llvm/lib/Target/PowerPC/
DPPCInstrAltivec.td268 class VA1a_Int_Ty<bits<6> xo, string opc, Intrinsic IntID, ValueType Ty>
271 [(set Ty:$vD, (IntID Ty:$vA, Ty:$vB, Ty:$vC))]>;
275 class VA1a_Int_Ty2<bits<6> xo, string opc, Intrinsic IntID, ValueType OutTy,
279 [(set OutTy:$vD, (IntID InTy:$vA, InTy:$vB, InTy:$vC))]>;
283 class VA1a_Int_Ty3<bits<6> xo, string opc, Intrinsic IntID, ValueType OutTy,
288 (IntID In1Ty:$vA, In1Ty:$vB, In2Ty:$vC))]>;
291 class VX1_Int_Ty<bits<11> xo, string opc, Intrinsic IntID, ValueType Ty>
294 [(set Ty:$vD, (IntID Ty:$vA, Ty:$vB))]>;
298 class VX1_Int_Ty2<bits<11> xo, string opc, Intrinsic IntID, ValueType OutTy,
302 [(set OutTy:$vD, (IntID InTy:$vA, InTy:$vB))]>;
[all …]
DPPCInstrQPX.td39 class QPXA1_Int<bits<6> opcode, bits<5> xo, string opc, Intrinsic IntID>
42 [(set v4f64:$FRT, (IntID v4f64:$FRA, v4f64:$FRB, v4f64:$FRC))]>;
44 class QPXA1s_Int<bits<6> opcode, bits<5> xo, string opc, Intrinsic IntID>
47 [(set v4f64:$FRT, (IntID v4f64:$FRA, v4f64:$FRB, v4f64:$FRC))]>;
49 class QPXA2_Int<bits<6> opcode, bits<5> xo, string opc, Intrinsic IntID>
52 [(set v4f64:$FRT, (IntID v4f64:$FRA, v4f64:$FRB))]>;
54 class QPXA3_Int<bits<6> opcode, bits<5> xo, string opc, Intrinsic IntID>
57 [(set v4f64:$FRT, (IntID v4f64:$FRA, v4f64:$FRC))]>;
59 class QPXA4_Int<bits<6> opcode, bits<5> xo, string opc, Intrinsic IntID>
62 [(set v4f64:$FRT, (IntID v4f64:$FRB))]>;
[all …]
/external/swiftshader/third_party/llvm-subzero/include/llvm/IR/
DGlobalValue.h83 IntID((Intrinsic::ID)0U), Parent(nullptr) { in GlobalValue()
140 Intrinsic::ID IntID;
/external/llvm/include/llvm/IR/
DGlobalValue.h75 IntID((Intrinsic::ID)0U), Parent(nullptr) { in GlobalValue()
131 Intrinsic::ID IntID;
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/
DPPCInstrAltivec.td273 class VA1a_Int_Ty<bits<6> xo, string opc, Intrinsic IntID, ValueType Ty>
276 [(set Ty:$vD, (IntID Ty:$vA, Ty:$vB, Ty:$vC))]>;
280 class VA1a_Int_Ty2<bits<6> xo, string opc, Intrinsic IntID, ValueType OutTy,
284 [(set OutTy:$vD, (IntID InTy:$vA, InTy:$vB, InTy:$vC))]>;
288 class VA1a_Int_Ty3<bits<6> xo, string opc, Intrinsic IntID, ValueType OutTy,
293 (IntID In1Ty:$vA, In1Ty:$vB, In2Ty:$vC))]>;
296 class VX1_Int_Ty<bits<11> xo, string opc, Intrinsic IntID, ValueType Ty>
299 [(set Ty:$vD, (IntID Ty:$vA, Ty:$vB))]>;
303 class VX1_Int_Ty2<bits<11> xo, string opc, Intrinsic IntID, ValueType OutTy,
307 [(set OutTy:$vD, (IntID InTy:$vA, InTy:$vB))]>;
[all …]
DPPCInstrQPX.td38 class QPXA1_Int<bits<6> opcode, bits<5> xo, string opc, Intrinsic IntID>
41 [(set v4f64:$FRT, (IntID v4f64:$FRA, v4f64:$FRB, v4f64:$FRC))]>;
43 class QPXA1s_Int<bits<6> opcode, bits<5> xo, string opc, Intrinsic IntID>
46 [(set v4f64:$FRT, (IntID v4f64:$FRA, v4f64:$FRB, v4f64:$FRC))]>;
48 class QPXA2_Int<bits<6> opcode, bits<5> xo, string opc, Intrinsic IntID>
51 [(set v4f64:$FRT, (IntID v4f64:$FRA, v4f64:$FRB))]>;
53 class QPXA3_Int<bits<6> opcode, bits<5> xo, string opc, Intrinsic IntID>
56 [(set v4f64:$FRT, (IntID v4f64:$FRA, v4f64:$FRC))]>;
58 class QPXA4_Int<bits<6> opcode, bits<5> xo, string opc, Intrinsic IntID>
61 [(set v4f64:$FRT, (IntID v4f64:$FRB))]>;
[all …]
/external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/IR/
DGlobalValue.h83 IntID((Intrinsic::ID)0U), Parent(nullptr) { in GlobalValue()
162 Intrinsic::ID IntID;
/external/llvm-project/llvm/include/llvm/IR/
DGlobalValue.h83 IntID((Intrinsic::ID)0U), Parent(nullptr) { in GlobalValue()
156 Intrinsic::ID IntID;
/external/llvm-project/llvm/lib/Target/PowerPC/
DPPCInstrAltivec.td273 class VA1a_Int_Ty<bits<6> xo, string opc, Intrinsic IntID, ValueType Ty>
276 [(set Ty:$vD, (IntID Ty:$vA, Ty:$vB, Ty:$vC))]>;
280 class VA1a_Int_Ty2<bits<6> xo, string opc, Intrinsic IntID, ValueType OutTy,
284 [(set OutTy:$vD, (IntID InTy:$vA, InTy:$vB, InTy:$vC))]>;
288 class VA1a_Int_Ty3<bits<6> xo, string opc, Intrinsic IntID, ValueType OutTy,
293 (IntID In1Ty:$vA, In1Ty:$vB, In2Ty:$vC))]>;
296 class VX1_Int_Ty<bits<11> xo, string opc, Intrinsic IntID, ValueType Ty>
299 [(set Ty:$vD, (IntID Ty:$vA, Ty:$vB))]>;
303 class VX1_Int_Ty2<bits<11> xo, string opc, Intrinsic IntID, ValueType OutTy,
307 [(set OutTy:$vD, (IntID InTy:$vA, InTy:$vB))]>;
[all …]
/external/llvm/lib/IR/
DFunction.cpp277 if (IntID) in Function()
278 setAttributes(Intrinsic::getAttributes(getContext(), IntID)); in Function()
485 IntID = Intrinsic::not_intrinsic; in recalculateIntrinsicID()
488 IntID = lookupIntrinsicID(ValName); in recalculateIntrinsicID()
/external/llvm-project/llvm/lib/IR/
DFunction.cpp358 if (IntID) in Function()
359 setAttributes(Intrinsic::getAttributes(getContext(), IntID)); in Function()
655 return isTargetIntrinsic(IntID); in isTargetIntrinsic()
703 IntID = Intrinsic::not_intrinsic; in recalculateIntrinsicID()
707 IntID = lookupIntrinsicID(Name); in recalculateIntrinsicID()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/IR/
DFunction.cpp285 if (IntID) in Function()
286 setAttributes(Intrinsic::getAttributes(getContext(), IntID)); in Function()
589 IntID = Intrinsic::not_intrinsic; in recalculateIntrinsicID()
593 IntID = lookupIntrinsicID(Name); in recalculateIntrinsicID()

12