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Searched refs:IsLE (Results 1 – 25 of 43) sorted by relevance

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/external/llvm-project/llvm/lib/Object/
DDecompressor.cpp21 bool IsLE, bool Is64Bit) { in create() argument
27 : D.consumeCompressedZLibHeader(Is64Bit, IsLE); in create()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Object/
DDecompressor.cpp21 bool IsLE, bool Is64Bit) { in create() argument
27 : D.consumeCompressedZLibHeader(Is64Bit, IsLE); in create()
/external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/Object/
DDecompressor.h28 bool IsLE, bool Is64Bit);
/external/llvm-project/llvm/include/llvm/Object/
DDecompressor.h28 bool IsLE, bool Is64Bit);
/external/llvm/lib/DebugInfo/DWARF/
DDWARFContext.cpp613 bool IsLE, bool Is64Bit) { in consumeCompressedZLibHeader() argument
619 DataExtractor Extractor(Data, IsLE, 0); in consumeCompressedZLibHeader()
637 SmallString<32> &Out, bool ZLibStyle, bool IsLE, in tryDecompress() argument
644 ZLibStyle ? consumeCompressedZLibHeader(Data, OriginalSize, IsLE, Is64Bit) in tryDecompress()
/external/llvm/lib/Target/Mips/
DMipsMSAInstrInfo.td3566 def : MSABitconvertPat<v16i8, v8i16, MSA128B, [HasMSA, IsLE]>;
3567 def : MSABitconvertPat<v16i8, v4i32, MSA128B, [HasMSA, IsLE]>;
3568 def : MSABitconvertPat<v16i8, v2i64, MSA128B, [HasMSA, IsLE]>;
3569 def : MSABitconvertPat<v16i8, v8f16, MSA128B, [HasMSA, IsLE]>;
3570 def : MSABitconvertPat<v16i8, v4f32, MSA128B, [HasMSA, IsLE]>;
3571 def : MSABitconvertPat<v16i8, v2f64, MSA128B, [HasMSA, IsLE]>;
3573 def : MSABitconvertPat<v8i16, v16i8, MSA128H, [HasMSA, IsLE]>;
3574 def : MSABitconvertPat<v8i16, v4i32, MSA128H, [HasMSA, IsLE]>;
3575 def : MSABitconvertPat<v8i16, v2i64, MSA128H, [HasMSA, IsLE]>;
3576 def : MSABitconvertPat<v8i16, v4f32, MSA128H, [HasMSA, IsLE]>;
[all …]
/external/llvm-project/llvm/lib/Target/Mips/
DMipsMSAInstrInfo.td3626 def : MSABitconvertPat<v16i8, v8i16, MSA128B, [HasMSA, IsLE]>;
3627 def : MSABitconvertPat<v16i8, v4i32, MSA128B, [HasMSA, IsLE]>;
3628 def : MSABitconvertPat<v16i8, v2i64, MSA128B, [HasMSA, IsLE]>;
3629 def : MSABitconvertPat<v16i8, v8f16, MSA128B, [HasMSA, IsLE]>;
3630 def : MSABitconvertPat<v16i8, v4f32, MSA128B, [HasMSA, IsLE]>;
3631 def : MSABitconvertPat<v16i8, v2f64, MSA128B, [HasMSA, IsLE]>;
3633 def : MSABitconvertPat<v8i16, v16i8, MSA128H, [HasMSA, IsLE]>;
3634 def : MSABitconvertPat<v8i16, v4i32, MSA128H, [HasMSA, IsLE]>;
3635 def : MSABitconvertPat<v8i16, v2i64, MSA128H, [HasMSA, IsLE]>;
3636 def : MSABitconvertPat<v8i16, v4f32, MSA128H, [HasMSA, IsLE]>;
[all …]
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/
DMipsMSAInstrInfo.td3606 def : MSABitconvertPat<v16i8, v8i16, MSA128B, [HasMSA, IsLE]>;
3607 def : MSABitconvertPat<v16i8, v4i32, MSA128B, [HasMSA, IsLE]>;
3608 def : MSABitconvertPat<v16i8, v2i64, MSA128B, [HasMSA, IsLE]>;
3609 def : MSABitconvertPat<v16i8, v8f16, MSA128B, [HasMSA, IsLE]>;
3610 def : MSABitconvertPat<v16i8, v4f32, MSA128B, [HasMSA, IsLE]>;
3611 def : MSABitconvertPat<v16i8, v2f64, MSA128B, [HasMSA, IsLE]>;
3613 def : MSABitconvertPat<v8i16, v16i8, MSA128H, [HasMSA, IsLE]>;
3614 def : MSABitconvertPat<v8i16, v4i32, MSA128H, [HasMSA, IsLE]>;
3615 def : MSABitconvertPat<v8i16, v2i64, MSA128H, [HasMSA, IsLE]>;
3616 def : MSABitconvertPat<v8i16, v4f32, MSA128H, [HasMSA, IsLE]>;
[all …]
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/
DPPCISelLowering.h553 bool &Swap, bool IsLE);
574 bool &Swap, bool IsLE);
594 unsigned &InsertAtByte, bool &Swap, bool IsLE);
DPPCISelLowering.cpp1512 bool IsLE = DAG.getDataLayout().isLittleEndian(); in isVPKUHUMShuffleMask() local
1514 if (IsLE) in isVPKUHUMShuffleMask()
1520 if (!IsLE) in isVPKUHUMShuffleMask()
1526 unsigned j = IsLE ? 0 : 1; in isVPKUHUMShuffleMask()
1543 bool IsLE = DAG.getDataLayout().isLittleEndian(); in isVPKUWUMShuffleMask() local
1545 if (IsLE) in isVPKUWUMShuffleMask()
1552 if (!IsLE) in isVPKUWUMShuffleMask()
1559 unsigned j = IsLE ? 0 : 2; in isVPKUWUMShuffleMask()
1585 bool IsLE = DAG.getDataLayout().isLittleEndian(); in isVPKUDUMShuffleMask() local
1587 if (IsLE) in isVPKUDUMShuffleMask()
[all …]
/external/llvm-project/llvm/lib/Target/PowerPC/
DPPCISelLowering.h611 bool &Swap, bool IsLE);
632 bool &Swap, bool IsLE);
652 unsigned &InsertAtByte, bool &Swap, bool IsLE);
DPPCISelLowering.cpp1638 bool IsLE = DAG.getDataLayout().isLittleEndian(); in isVPKUHUMShuffleMask() local
1640 if (IsLE) in isVPKUHUMShuffleMask()
1646 if (!IsLE) in isVPKUHUMShuffleMask()
1652 unsigned j = IsLE ? 0 : 1; in isVPKUHUMShuffleMask()
1669 bool IsLE = DAG.getDataLayout().isLittleEndian(); in isVPKUWUMShuffleMask() local
1671 if (IsLE) in isVPKUWUMShuffleMask()
1678 if (!IsLE) in isVPKUWUMShuffleMask()
1685 unsigned j = IsLE ? 0 : 2; in isVPKUWUMShuffleMask()
1711 bool IsLE = DAG.getDataLayout().isLittleEndian(); in isVPKUDUMShuffleMask() local
1713 if (IsLE) in isVPKUDUMShuffleMask()
[all …]
/external/llvm-project/llvm/lib/ObjectYAML/
DMachOEmitter.cpp333 makeRelocationInfo(const MachOYAML::Relocation &R, bool IsLE) { in makeRelocationInfo() argument
337 if (IsLE) in makeRelocationInfo()
DELFEmitter.cpp1965 bool IsLE = Doc.Header.Data == ELFYAML::ELF_ELFDATA(ELF::ELFDATA2LSB); in yaml2elf() local
1968 if (IsLE) in yaml2elf()
1972 if (IsLE) in yaml2elf()
/external/llvm/lib/Target/AArch64/
DAArch64InstrInfo.td37 def IsLE : Predicate<"Subtarget->isLittleEndian()">;
1424 let Predicates = [IsLE] in {
1437 let Predicates = [IsLE] in {
1564 let Predicates = [IsLE] in {
1583 let Predicates = [IsLE] in {
1726 let Predicates = [IsLE] in {
1744 let Predicates = [IsLE] in {
2049 let Predicates = [IsLE] in {
2062 let Predicates = [IsLE] in {
2134 let Predicates = [IsLE] in {
[all …]
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/
DARMPredicates.td201 def IsLE : Predicate<"MF->getDataLayout().isLittleEndian()">;
/external/llvm/lib/Target/PowerPC/
DPPCISelLowering.cpp1150 bool IsLE = DAG.getDataLayout().isLittleEndian(); in isVPKUHUMShuffleMask() local
1152 if (IsLE) in isVPKUHUMShuffleMask()
1158 if (!IsLE) in isVPKUHUMShuffleMask()
1164 unsigned j = IsLE ? 0 : 1; in isVPKUHUMShuffleMask()
1181 bool IsLE = DAG.getDataLayout().isLittleEndian(); in isVPKUWUMShuffleMask() local
1183 if (IsLE) in isVPKUWUMShuffleMask()
1190 if (!IsLE) in isVPKUWUMShuffleMask()
1197 unsigned j = IsLE ? 0 : 2; in isVPKUWUMShuffleMask()
1223 bool IsLE = DAG.getDataLayout().isLittleEndian(); in isVPKUDUMShuffleMask() local
1225 if (IsLE) in isVPKUDUMShuffleMask()
[all …]
DPPCISelLowering.h439 unsigned &InsertAtByte, bool &Swap, bool IsLE);
/external/llvm-project/llvm/lib/Target/ARM/
DARMPredicates.td213 def IsLE : Predicate<"MF->getDataLayout().isLittleEndian()">;
/external/llvm-project/llvm/lib/Target/AArch64/
DAArch64InstrInfo.td152 def IsLE : Predicate<"Subtarget->isLittleEndian()">;
2305 let Predicates = [IsLE] in {
2319 let Predicates = [IsLE] in {
2451 let Predicates = [IsLE] in {
2472 let Predicates = [IsLE] in {
2640 let Predicates = [IsLE] in {
2658 let Predicates = [IsLE] in {
2981 let Predicates = [IsLE] in {
2995 let Predicates = [IsLE, UseSTRQro] in {
3080 let Predicates = [IsLE] in {
[all …]
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/
DAArch64InstrInfo.td145 def IsLE : Predicate<"Subtarget->isLittleEndian()">;
2132 let Predicates = [IsLE] in {
2145 let Predicates = [IsLE] in {
2272 let Predicates = [IsLE] in {
2291 let Predicates = [IsLE] in {
2457 let Predicates = [IsLE] in {
2475 let Predicates = [IsLE] in {
2794 let Predicates = [IsLE] in {
2807 let Predicates = [IsLE, UseSTRQro] in {
2886 let Predicates = [IsLE] in {
[all …]
/external/swiftshader/third_party/llvm-10.0/llvm/lib/ObjectYAML/
DELFEmitter.cpp1448 bool IsLE = Doc.Header.Data == ELFYAML::ELF_ELFDATA(ELF::ELFDATA2LSB); in yaml2elf() local
1451 if (IsLE) in yaml2elf()
1455 if (IsLE) in yaml2elf()
/external/llvm/lib/Target/ARM/
DARMInstrNEON.td2353 (VLD1d16 addrmode6:$addr)>, Requires<[IsLE]>;
2355 (VST1d16 addrmode6:$addr, DPR:$value)>, Requires<[IsLE]>;
2357 (VLD1d8 addrmode6:$addr)>, Requires<[IsLE]>;
2359 (VST1d8 addrmode6:$addr, DPR:$value)>, Requires<[IsLE]>;
2372 (VLD1q32 addrmode6:$addr)>, Requires<[IsLE]>;
2374 (VST1q32 addrmode6:$addr, QPR:$value)>, Requires<[IsLE]>;
2376 (VLD1q16 addrmode6:$addr)>, Requires<[IsLE]>;
2378 (VST1q16 addrmode6:$addr, QPR:$value)>, Requires<[IsLE]>;
2380 (VLD1q8 addrmode6:$addr)>, Requires<[IsLE]>;
2382 (VST1q8 addrmode6:$addr, QPR:$value)>, Requires<[IsLE]>;
[all …]
DARMInstrThumb.td1440 Requires<[IsThumb, IsThumb1Only, IsLE]>;
1442 Requires<[IsThumb, IsThumb1Only, IsLE]>;
1444 Requires<[IsThumb, IsThumb1Only, IsLE]>;
/external/llvm/lib/Transforms/InstCombine/
DInstCombineCompares.cpp3117 bool IsLE = (Pred == ICmpInst::ICMP_SLE || Pred == ICmpInst::ICMP_ULE); in canonicalizeCmpWithConstant() local
3121 assert(IsLE ? !CI->isMaxValue(IsSigned) : !CI->isMinValue(IsSigned)); in canonicalizeCmpWithConstant()
3137 if (!CI || (IsLE ? CI->isMaxValue(IsSigned) : CI->isMinValue(IsSigned))) in canonicalizeCmpWithConstant()
3147 Constant *OneOrNegOne = ConstantInt::get(Op1Type, IsLE ? 1 : -1, true); in canonicalizeCmpWithConstant()
3148 CmpInst::Predicate NewPred = IsLE ? ICmpInst::ICMP_ULT: ICmpInst::ICMP_UGT; in canonicalizeCmpWithConstant()

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