Searched refs:IsPostIndex (Results 1 – 11 of 11) sorted by relevance
5044 operand.IsPostIndex() && ((rn.GetCode() & 0xf) != 0xf) && in ldr()5089 if ((offset >= -4095) && (offset <= 4095) && operand.IsPostIndex() && in ldr()5164 if (operand.IsShiftValid() && operand.IsPostIndex() && in ldr()5347 operand.IsPostIndex() && ((rn.GetCode() & 0xf) != 0xf)) { in ldrb()5387 if ((offset >= -4095) && (offset <= 4095) && operand.IsPostIndex() && in ldrb()5464 if (operand.IsShiftValid() && operand.IsPostIndex() && in ldrb()5600 operand.IsPostIndex() && ((rn.GetCode() & 0xf) != 0xf) && in ldrd()5647 (offset >= -255) && (offset <= 255) && operand.IsPostIndex() && in ldrd()5704 operand.IsPostIndex() && cond.IsNotNever() && in ldrd()5977 operand.IsPostIndex() && ((rn.GetCode() & 0xf) != 0xf)) { in ldrh()[all …]
830 bool IsPostIndex() const { return GetAddrMode() == PostIndex; } in IsPostIndex() function
367 bool MemOperand::IsPostIndex() const { return addrmode_ == PostIndex; } in IsPostIndex() function in vixl::aarch64::MemOperand
439 bool IsPostIndex() const;
1969 } else if (addr.IsPostIndex() && !IsImmLSUnscaled(offset)) { in LS_MACRO_LIST()2021 } else if (addr.IsPostIndex()) { in LSPAIR_MACRO_LIST()2423 VIXL_ASSERT(!(mem.IsPreIndex() || mem.IsPostIndex())); in LoadStoreCPURegListHelper()
1140 VIXL_ASSERT(addr.IsPostIndex()); in LoadStorePair()1946 if (addr.IsPostIndex()) { in LoadStoreStructAddrModeField()5701 if (addr.IsPostIndex() && IsImmLSUnscaled(offset)) { in LoadStoreMemOperand()
3435 if (!memop.IsPostIndex()) { in TestHelper()3478 if (!memop.IsPostIndex()) { in TestHelper()
3448 if (!memop.IsPostIndex()) { in TestHelper()3492 if (!memop.IsPostIndex()) { in TestHelper()
3444 if (!memop.IsPostIndex()) { in TestHelper()3488 if (!memop.IsPostIndex()) { in TestHelper()