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Searched refs:IsQuietNaN (Results 1 – 7 of 7) sorted by relevance

/external/vixl/test/aarch64/
Dtest-assembler-fp-aarch64.cc917 VIXL_ASSERT(IsQuietNaN(q1)); in TEST()
918 VIXL_ASSERT(IsQuietNaN(q2)); in TEST()
919 VIXL_ASSERT(IsQuietNaN(qa)); in TEST()
928 VIXL_ASSERT(IsQuietNaN(s1_proc)); in TEST()
929 VIXL_ASSERT(IsQuietNaN(s2_proc)); in TEST()
930 VIXL_ASSERT(IsQuietNaN(sa_proc)); in TEST()
931 VIXL_ASSERT(IsQuietNaN(q1_proc)); in TEST()
932 VIXL_ASSERT(IsQuietNaN(q2_proc)); in TEST()
933 VIXL_ASSERT(IsQuietNaN(qa_proc)); in TEST()
940 VIXL_ASSERT(IsQuietNaN(s1_proc_neg)); in TEST()
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Dtest-assembler-sve-aarch64.cc17282 VIXL_ASSERT(IsQuietNaN(qa)); in TEST_SVE()
17283 VIXL_ASSERT(IsQuietNaN(qn)); in TEST_SVE()
17284 VIXL_ASSERT(IsQuietNaN(qm)); in TEST_SVE()
17438 VIXL_ASSERT(IsQuietNaN(qa)); in TEST_SVE()
17439 VIXL_ASSERT(IsQuietNaN(qn)); in TEST_SVE()
17440 VIXL_ASSERT(IsQuietNaN(qm)); in TEST_SVE()
17594 VIXL_ASSERT(IsQuietNaN(qa)); in TEST_SVE()
17595 VIXL_ASSERT(IsQuietNaN(qn)); in TEST_SVE()
17596 VIXL_ASSERT(IsQuietNaN(qm)); in TEST_SVE()
Dtest-assembler-neon-aarch64.cc10613 VIXL_ASSERT(IsQuietNaN(qnan)); in TEST()
10614 VIXL_ASSERT(IsQuietNaN(snan_processed)); in TEST()
10615 VIXL_ASSERT(IsQuietNaN(qnan_processed)); in TEST()
/external/llvm-project/flang/include/flang/Evaluate/
Dreal.h77 constexpr bool IsQuietNaN() const { in IsQuietNaN() function
/external/vixl/src/aarch64/
Dsimulator-aarch64.h4649 VIXL_ASSERT(IsQuietNaN(op1));
4652 VIXL_ASSERT(IsQuietNaN(op2));
4668 VIXL_ASSERT(IsQuietNaN(op1));
4671 VIXL_ASSERT(IsQuietNaN(op2));
4674 VIXL_ASSERT(IsQuietNaN(op3));
Dlogic-aarch64.cc4367 if (operation_generates_nan && IsQuietNaN(a)) { in FPMulAdd()
4454 if (IsQuietNaN(a) && !IsQuietNaN(b)) { in FPMaxNM()
4456 } else if (!IsQuietNaN(a) && IsQuietNaN(b)) { in FPMaxNM()
4481 if (IsQuietNaN(a) && !IsQuietNaN(b)) { in FPMinNM()
4483 } else if (!IsQuietNaN(a) && IsQuietNaN(b)) { in FPMinNM()
/external/vixl/src/
Dutils-vixl.h439 inline bool IsQuietNaN(T num) { in IsQuietNaN() function