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Searched refs:IsUndef (Results 1 – 25 of 41) sorted by relevance

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/external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/GlobalISel/
DCombinerHelper.h122 bool matchCombineConcatVectors(MachineInstr &MI, bool &IsUndef,
126 void applyCombineConcatVectors(MachineInstr &MI, bool IsUndef,
/external/llvm/include/llvm/CodeGen/
DMachineOperand.h118 bool IsUndef : 1; variable
304 return IsUndef; in isUndef()
388 IsUndef = Val;
620 Op.IsUndef = isUndef;
DMachineInstr.h1101 void setRegisterDefReadUndef(unsigned Reg, bool IsUndef = true);
/external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/
DMachineOperand.h130 unsigned IsUndef : 1; variable
395 return IsUndef; in isUndef()
511 IsUndef = Val;
793 Op.IsUndef = isUndef;
DMachineInstr.h1422 void setRegisterDefReadUndef(Register Reg, bool IsUndef = true);
/external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/GlobalISel/
DCombinerHelper.cpp116 bool IsUndef = false; in tryCombineConcatVectors() local
118 if (matchCombineConcatVectors(MI, IsUndef, Ops)) { in tryCombineConcatVectors()
119 applyCombineConcatVectors(MI, IsUndef, Ops); in tryCombineConcatVectors()
125 bool CombinerHelper::matchCombineConcatVectors(MachineInstr &MI, bool &IsUndef, in matchCombineConcatVectors() argument
129 IsUndef = true; in matchCombineConcatVectors()
141 IsUndef = false; in matchCombineConcatVectors()
171 MachineInstr &MI, bool IsUndef, const ArrayRef<Register> Ops) { in applyCombineConcatVectors() argument
184 if (IsUndef) in applyCombineConcatVectors()
/external/llvm/test/CodeGen/X86/
Dpr23103.ll3 ; When commuting a VADDSDrr instruction, verify that the 'IsUndef' flag is
/external/llvm-project/llvm/test/CodeGen/X86/
Dpr23103.ll4 ; When commuting a VADDSDrr instruction, verify that the 'IsUndef' flag is
/external/llvm-project/llvm/include/llvm/CodeGen/
DMachineOperand.h130 unsigned IsUndef : 1; variable
395 return IsUndef; in isUndef()
511 IsUndef = Val;
803 Op.IsUndef = isUndef;
DMachineInstr.h1534 void setRegisterDefReadUndef(Register Reg, bool IsUndef = true);
/external/llvm-project/llvm/lib/Target/AMDGPU/
DSIShrinkInstructions.cpp251 bool IsUndef = true; in shrinkMIMG() local
263 IsUndef = false; in shrinkMIMG()
298 MI.getOperand(VAddr0Idx).setIsUndef(IsUndef); in shrinkMIMG()
373 const bool IsUndef = SrcReg->isUndef(); in shrinkScalarLogicOp() local
382 /*isDead*/ false, IsUndef); in shrinkScalarLogicOp()
DGCNHazardRecognizer.cpp896 bool IsUndef = Src0->isUndef(); in fixVcmpxPermlaneHazards() local
899 .addReg(Reg, RegState::Define | (IsUndef ? RegState::Dead : 0)) in fixVcmpxPermlaneHazards()
900 .addReg(Reg, IsUndef ? RegState::Undef : RegState::Kill); in fixVcmpxPermlaneHazards()
DSIInstrInfo.cpp1761 bool IsUndef = MI.getOperand(1).isUndef(); in expandPostRAPseudo() local
1770 .addReg(VecReg, RegState::Implicit | (IsUndef ? RegState::Undef : 0)); in expandPostRAPseudo()
1789 bool IsUndef = MI.getOperand(1).isUndef(); in expandPostRAPseudo() local
1805 RegState::Implicit | (IsUndef ? RegState::Undef : 0)); in expandPostRAPseudo()
1829 bool IsUndef = MI.getOperand(1).isUndef(); in expandPostRAPseudo() local
1841 .addReg(VecReg, RegState::Implicit | (IsUndef ? RegState::Undef : 0)) in expandPostRAPseudo()
1981 bool IsUndef = RegOp.isUndef(); in swapRegAndNonRegOperand() local
1997 NonRegOp.ChangeToRegister(Reg, false, false, IsKill, IsDead, IsUndef, IsDebug); in swapRegAndNonRegOperand()
/external/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/
DCombinerHelper.h179 bool matchCombineConcatVectors(MachineInstr &MI, bool &IsUndef,
183 void applyCombineConcatVectors(MachineInstr &MI, bool IsUndef,
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DSIShrinkInstructions.cpp250 bool IsUndef = true; in shrinkMIMG() local
262 IsUndef = false; in shrinkMIMG()
297 MI.getOperand(VAddr0Idx).setIsUndef(IsUndef); in shrinkMIMG()
DGCNHazardRecognizer.cpp895 bool IsUndef = Src0->isUndef(); in fixVcmpxPermlaneHazards() local
898 .addReg(Reg, RegState::Define | (IsUndef ? RegState::Dead : 0)) in fixVcmpxPermlaneHazards()
899 .addReg(Reg, IsUndef ? RegState::Undef : RegState::Kill); in fixVcmpxPermlaneHazards()
/external/llvm-project/clang/include/clang/Basic/
DTargetBuiltins.h254 bool isUndef() const { return Flags & IsUndef; } in isUndef()
Darm_sve.td204 def IsUndef : FlagType<0x80000000>; // Codegen `undef` of given type.
1438 def SVUNDEF_1 : SInst<"svundef_{d}", "d", "csilUcUsUiUlhfd", MergeNone, "", [IsUndef]>;
1439 def SVUNDEF_2 : SInst<"svundef2_{d}", "2", "csilUcUsUiUlhfd", MergeNone, "", [IsUndef]>;
1440 def SVUNDEF_3 : SInst<"svundef3_{d}", "3", "csilUcUsUiUlhfd", MergeNone, "", [IsUndef]>;
1441 def SVUNDEF_4 : SInst<"svundef4_{d}", "4", "csilUcUsUiUlhfd", MergeNone, "", [IsUndef]>;
1448 def SVUNDEF_1_BF16 : SInst<"svundef_{d}", "d", "b", MergeNone, "", [IsUndef]>;
1449 def SVUNDEF_2_BF16 : SInst<"svundef2_{d}", "2", "b", MergeNone, "", [IsUndef]>;
1450 def SVUNDEF_3_BF16 : SInst<"svundef3_{d}", "3", "b", MergeNone, "", [IsUndef]>;
1451 def SVUNDEF_4_BF16 : SInst<"svundef4_{d}", "4", "b", MergeNone, "", [IsUndef]>;
/external/llvm-project/llvm/lib/CodeGen/GlobalISel/
DCombinerHelper.cpp101 bool IsUndef = false; in tryCombineConcatVectors() local
103 if (matchCombineConcatVectors(MI, IsUndef, Ops)) { in tryCombineConcatVectors()
104 applyCombineConcatVectors(MI, IsUndef, Ops); in tryCombineConcatVectors()
110 bool CombinerHelper::matchCombineConcatVectors(MachineInstr &MI, bool &IsUndef, in matchCombineConcatVectors() argument
114 IsUndef = true; in matchCombineConcatVectors()
126 IsUndef = false; in matchCombineConcatVectors()
156 MachineInstr &MI, bool IsUndef, const ArrayRef<Register> Ops) { in applyCombineConcatVectors() argument
169 if (IsUndef) in applyCombineConcatVectors()
/external/llvm/lib/CodeGen/
DMachineInstr.cpp199 IsUndef = isUndef; in ChangeToRegister()
2079 void MachineInstr::setRegisterDefReadUndef(unsigned Reg, bool IsUndef) { in setRegisterDefReadUndef() argument
2083 MO.setIsUndef(IsUndef); in setRegisterDefReadUndef()
DRegisterCoalescer.cpp1221 bool IsUndef = true; in addUndefFlag() local
1226 IsUndef = false; in addUndefFlag()
1230 if (IsUndef) { in addUndefFlag()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/
DHexagonISelLoweringHVX.cpp376 bool IsSplat = true, IsUndef = true; in buildHvxVectorReg() local
381 IsUndef = false; in buildHvxVectorReg()
387 if (IsUndef) in buildHvxVectorReg()
/external/llvm-project/llvm/lib/CodeGen/
DMachineInstr.cpp2017 void MachineInstr::setRegisterDefReadUndef(Register Reg, bool IsUndef) { in setRegisterDefReadUndef() argument
2021 MO.setIsUndef(IsUndef); in setRegisterDefReadUndef()
DRegisterCoalescer.cpp1685 bool IsUndef = true; in addUndefFlag() local
1690 IsUndef = false; in addUndefFlag()
1694 if (IsUndef) { in addUndefFlag()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/
DMachineInstr.cpp1925 void MachineInstr::setRegisterDefReadUndef(Register Reg, bool IsUndef) { in setRegisterDefReadUndef() argument
1929 MO.setIsUndef(IsUndef); in setRegisterDefReadUndef()

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