| /external/llvm/lib/CodeGen/ |
| D | LiveRangeCalc.h | 89 SlotIndex Kill; member
95 : LR(LR), DomNode(node), Kill(kill), Value(nullptr) {} in LiveInBlock()
115 SlotIndex Kill, unsigned PhysReg);
232 SlotIndex Kill = SlotIndex()) {
233 LiveIn.push_back(LiveInBlock(LR, DomNode, Kill));
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| /external/rust/crates/tokio/src/process/ |
| D | kill.rs | 4 pub(crate) trait Kill { interface
9 impl<T: Kill> Kill for &mut T { impl
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| D | mod.rs | 193 use crate::process::kill::Kill;
815 struct ChildDropGuard<T: Kill> {
820 impl<T: Kill> Kill for ChildDropGuard<T> {
832 impl<T: Kill> Drop for ChildDropGuard<T> {
842 F: Future<Output = Result<T, E>> + Kill + Unpin,
1252 use super::kill::Kill;
1281 impl Kill for Mock {
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| /external/angle/third_party/vulkan-deps/glslang/src/Test/baseResults/ |
| D | hlsl.discard.frag.out | 16 0:4 Branch: Kill
34 0:11 Branch: Kill
42 0:13 Branch: Kill
72 0:4 Branch: Kill
90 0:11 Branch: Kill
98 0:13 Branch: Kill
166 Kill
185 Kill
190 Kill
|
| /external/deqp-deps/glslang/Test/baseResults/ |
| D | hlsl.discard.frag.out | 16 0:4 Branch: Kill
34 0:11 Branch: Kill
42 0:13 Branch: Kill
72 0:4 Branch: Kill
90 0:11 Branch: Kill
98 0:13 Branch: Kill
166 Kill
185 Kill
190 Kill
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| D | hlsl.clip.frag.out | 21 0:9 Branch: Kill
60 0:9 Branch: Kill
120 Kill
|
| /external/llvm-project/llvm/lib/Target/AVR/ |
| D | AVRFrameLowering.cpp | 72 .addReg(AVR::R1R0, RegState::Kill) in emitPrologue()
79 .addReg(AVR::R0, RegState::Kill) in emitPrologue()
83 .addReg(AVR::R0, RegState::Kill) in emitPrologue()
84 .addReg(AVR::R0, RegState::Kill) in emitPrologue()
122 .addReg(AVR::R29R28, RegState::Kill) in emitPrologue()
149 .addReg(AVR::R0, RegState::Kill); in restoreStatusRegister()
204 .addReg(AVR::R29R28, RegState::Kill) in emitEpilogue()
211 .addReg(AVR::R29R28, RegState::Kill); in emitEpilogue()
360 .addReg(AVR::R31R30, RegState::Kill) in eliminateCallFramePseudoInstr()
365 .addReg(AVR::R31R30, RegState::Kill); in eliminateCallFramePseudoInstr()
[all …]
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| D | AVRRegisterInfo.cpp | 201 .addReg(DstReg, RegState::Kill) in eliminateFrameIndex()
229 .addReg(AVR::R29R28, RegState::Kill) in eliminateFrameIndex()
236 .addReg(AVR::R0, RegState::Kill); in eliminateFrameIndex()
241 .addReg(AVR::R29R28, RegState::Kill) in eliminateFrameIndex()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/XCore/ |
| D | XCoreRegisterInfo.cpp | 108 .addReg(ScratchOffset, RegState::Kill) in InsertFPConstInst()
115 .addReg(ScratchOffset, RegState::Kill) in InsertFPConstInst()
121 .addReg(ScratchOffset, RegState::Kill); in InsertFPConstInst()
184 .addReg(ScratchBase, RegState::Kill) in InsertSPConstInst()
185 .addReg(ScratchOffset, RegState::Kill) in InsertSPConstInst()
191 .addReg(ScratchBase, RegState::Kill) in InsertSPConstInst()
192 .addReg(ScratchOffset, RegState::Kill) in InsertSPConstInst()
197 .addReg(ScratchBase, RegState::Kill) in InsertSPConstInst()
198 .addReg(ScratchOffset, RegState::Kill); in InsertSPConstInst()
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| /external/llvm-project/llvm/lib/Target/XCore/ |
| D | XCoreRegisterInfo.cpp | 108 .addReg(ScratchOffset, RegState::Kill) in InsertFPConstInst()
115 .addReg(ScratchOffset, RegState::Kill) in InsertFPConstInst()
121 .addReg(ScratchOffset, RegState::Kill); in InsertFPConstInst()
184 .addReg(ScratchBase, RegState::Kill) in InsertSPConstInst()
185 .addReg(ScratchOffset, RegState::Kill) in InsertSPConstInst()
191 .addReg(ScratchBase, RegState::Kill) in InsertSPConstInst()
192 .addReg(ScratchOffset, RegState::Kill) in InsertSPConstInst()
197 .addReg(ScratchBase, RegState::Kill) in InsertSPConstInst()
198 .addReg(ScratchOffset, RegState::Kill); in InsertSPConstInst()
|
| /external/llvm/lib/Target/XCore/ |
| D | XCoreRegisterInfo.cpp | 109 .addReg(ScratchOffset, RegState::Kill) in InsertFPConstInst()
116 .addReg(ScratchOffset, RegState::Kill) in InsertFPConstInst()
122 .addReg(ScratchOffset, RegState::Kill); in InsertFPConstInst()
185 .addReg(ScratchBase, RegState::Kill) in InsertSPConstInst()
186 .addReg(ScratchOffset, RegState::Kill) in InsertSPConstInst()
192 .addReg(ScratchBase, RegState::Kill) in InsertSPConstInst()
193 .addReg(ScratchOffset, RegState::Kill) in InsertSPConstInst()
198 .addReg(ScratchBase, RegState::Kill) in InsertSPConstInst()
199 .addReg(ScratchOffset, RegState::Kill); in InsertSPConstInst()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AVR/ |
| D | AVRFrameLowering.cpp | 72 .addReg(AVR::R29R28, RegState::Kill) in emitPrologue()
81 .addReg(AVR::R1R0, RegState::Kill) in emitPrologue()
88 .addReg(AVR::R0, RegState::Kill) in emitPrologue()
92 .addReg(AVR::R0, RegState::Kill) in emitPrologue()
93 .addReg(AVR::R0, RegState::Kill) in emitPrologue()
132 .addReg(AVR::R29R28, RegState::Kill) in emitPrologue()
173 .addReg(AVR::R0, RegState::Kill); in emitEpilogue()
209 .addReg(AVR::R29R28, RegState::Kill) in emitEpilogue()
216 .addReg(AVR::R29R28, RegState::Kill); in emitEpilogue()
404 .addReg(AVR::R31R30, RegState::Kill) in eliminateCallFramePseudoInstr()
[all …]
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| D | AVRRegisterInfo.cpp | 197 .addReg(DstReg, RegState::Kill) in eliminateFrameIndex()
225 .addReg(AVR::R29R28, RegState::Kill) in eliminateFrameIndex()
232 .addReg(AVR::R0, RegState::Kill); in eliminateFrameIndex()
237 .addReg(AVR::R29R28, RegState::Kill) in eliminateFrameIndex()
|
| /external/llvm-project/llvm/include/llvm/CodeGen/ |
| D | LiveRangeCalc.h | 113 SlotIndex Kill; member
119 : LR(LR), DomNode(node), Kill(kill) {} in LiveInBlock()
245 SlotIndex Kill = SlotIndex()) {
246 LiveIn.push_back(LiveInBlock(LR, DomNode, Kill));
|
| D | LiveInterval.h | 94 const bool Kill; variable
98 bool Kill) in LiveQueryResult() argument
99 : EarlyVal(EarlyVal), LateVal(LateVal), EndPoint(EndPoint), Kill(Kill) in LiveQueryResult()
113 return Kill; in isKill()
489 SlotIndex StartIdx, SlotIndex Kill);
496 VNInfo *extendInBlock(SlotIndex StartIdx, SlotIndex Kill);
546 bool Kill = false; in Query() local
552 Kill = true; in Query()
554 return LiveQueryResult(EarlyVal, LateVal, EndPoint, Kill); in Query()
569 return LiveQueryResult(EarlyVal, LateVal, EndPoint, Kill); in Query()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
| D | LiveRangeCalc.h | 111 SlotIndex Kill; member
117 : LR(LR), DomNode(node), Kill(kill) {} in LiveInBlock()
270 SlotIndex Kill = SlotIndex()) {
271 LiveIn.push_back(LiveInBlock(LR, DomNode, Kill));
|
| D | LiveInterval.h | 93 const bool Kill; variable
97 bool Kill) in LiveQueryResult() argument
98 : EarlyVal(EarlyVal), LateVal(LateVal), EndPoint(EndPoint), Kill(Kill) in LiveQueryResult()
112 return Kill; in isKill()
488 SlotIndex StartIdx, SlotIndex Kill);
495 VNInfo *extendInBlock(SlotIndex StartIdx, SlotIndex Kill);
545 bool Kill = false; in Query() local
551 Kill = true; in Query()
553 return LiveQueryResult(EarlyVal, LateVal, EndPoint, Kill); in Query()
568 return LiveQueryResult(EarlyVal, LateVal, EndPoint, Kill); in Query()
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| /external/llvm-project/llvm/lib/Target/Hexagon/ |
| D | HexagonSplitDouble.cpp | 653 .addReg(AdrOp.getReg(), RSA & ~RegState::Kill, AdrOp.getSubReg()) in splitMemRef()
656 .addReg(AdrOp.getReg(), RSA & ~RegState::Kill, AdrOp.getSubReg()) in splitMemRef()
662 .addReg(AdrOp.getReg(), RSA & ~RegState::Kill, AdrOp.getSubReg()) in splitMemRef()
666 .addReg(AdrOp.getReg(), RSA & ~RegState::Kill, AdrOp.getSubReg()) in splitMemRef()
772 .addReg(Op1.getReg(), RS & ~RegState::Kill, Op1.getSubReg()); in splitExt()
812 .addReg(Op1.getReg(), RS & ~RegState::Kill, LoSR); in splitShift()
837 .addReg(Op1.getReg(), RS & ~RegState::Kill, LoSR); in splitShift()
840 .addReg(Op1.getReg(), RS & ~RegState::Kill, LoSR); in splitShift()
843 .addReg(Op1.getReg(), RS & ~RegState::Kill, LoSR) in splitShift()
849 .addReg(Op1.getReg(), RS & ~RegState::Kill, LoSR) in splitShift()
[all …]
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| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonSplitDouble.cpp | 608 .addReg(AdrOp.getReg(), RSA & ~RegState::Kill, AdrOp.getSubReg()) in splitMemRef()
611 .addReg(AdrOp.getReg(), RSA & ~RegState::Kill, AdrOp.getSubReg()) in splitMemRef()
617 .addReg(AdrOp.getReg(), RSA & ~RegState::Kill, AdrOp.getSubReg()) in splitMemRef()
621 .addReg(AdrOp.getReg(), RSA & ~RegState::Kill, AdrOp.getSubReg()) in splitMemRef()
731 .addReg(Op1.getReg(), RS & ~RegState::Kill, Op1.getSubReg()); in splitExt()
771 .addReg(Op1.getReg(), RS & ~RegState::Kill, LoSR); in splitShift()
796 .addReg(Op1.getReg(), RS & ~RegState::Kill, LoSR); in splitShift()
799 .addReg(Op1.getReg(), RS & ~RegState::Kill, LoSR); in splitShift()
802 .addReg(Op1.getReg(), RS & ~RegState::Kill, LoSR) in splitShift()
808 .addReg(Op1.getReg(), RS & ~RegState::Kill, LoSR) in splitShift()
[all …]
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/ |
| D | HexagonSplitDouble.cpp | 653 .addReg(AdrOp.getReg(), RSA & ~RegState::Kill, AdrOp.getSubReg()) in splitMemRef()
656 .addReg(AdrOp.getReg(), RSA & ~RegState::Kill, AdrOp.getSubReg()) in splitMemRef()
662 .addReg(AdrOp.getReg(), RSA & ~RegState::Kill, AdrOp.getSubReg()) in splitMemRef()
666 .addReg(AdrOp.getReg(), RSA & ~RegState::Kill, AdrOp.getSubReg()) in splitMemRef()
771 .addReg(Op1.getReg(), RS & ~RegState::Kill, Op1.getSubReg()); in splitExt()
811 .addReg(Op1.getReg(), RS & ~RegState::Kill, LoSR); in splitShift()
836 .addReg(Op1.getReg(), RS & ~RegState::Kill, LoSR); in splitShift()
839 .addReg(Op1.getReg(), RS & ~RegState::Kill, LoSR); in splitShift()
842 .addReg(Op1.getReg(), RS & ~RegState::Kill, LoSR) in splitShift()
848 .addReg(Op1.getReg(), RS & ~RegState::Kill, LoSR) in splitShift()
[all …]
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| /external/llvm/include/llvm/CodeGen/ |
| D | LiveInterval.h | 91 const bool Kill; variable
95 bool Kill) in LiveQueryResult() argument
96 : EarlyVal(EarlyVal), LateVal(LateVal), EndPoint(EndPoint), Kill(Kill) in LiveQueryResult()
110 return Kill; in isKill()
507 bool Kill = false; in Query() local
513 Kill = true; in Query()
515 return LiveQueryResult(EarlyVal, LateVal, EndPoint, Kill); in Query()
530 return LiveQueryResult(EarlyVal, LateVal, EndPoint, Kill); in Query()
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCRegisterInfo.cpp | 418 .addReg(NegSizeReg1, RegState::Kill); in lowerDynamicAlloc()
423 .addReg(Reg, RegState::Kill) in lowerDynamicAlloc()
443 .addReg(NegSizeReg1, RegState::Kill); in lowerDynamicAlloc()
448 .addReg(Reg, RegState::Kill) in lowerDynamicAlloc()
520 .addReg(Reg1, RegState::Kill) in lowerCRSpilling()
527 .addReg(Reg, RegState::Kill), in lowerCRSpilling()
566 .addReg(Reg1, RegState::Kill).addImm(32-ShiftBits).addImm(0) in lowerCRRestore()
571 .addReg(Reg, RegState::Kill); in lowerCRRestore()
609 .addReg(Reg1, RegState::Kill) in lowerCRBitSpilling()
614 .addReg(Reg, RegState::Kill), in lowerCRBitSpilling()
[all …]
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| /external/llvm/lib/Target/AMDGPU/ |
| D | SIFrameLowering.cpp | 108 .addReg(FlatScrInitHi, RegState::Kill); in emitPrologue()
120 .addReg(FlatScrInitLo, RegState::Kill) in emitPrologue()
218 .addReg(PreloadedScratchWaveOffsetReg, RegState::Kill); in emitPrologue()
236 .addReg(Lo, RegState::Kill); in emitPrologue()
238 .addReg(Hi, RegState::Kill); in emitPrologue()
|
| /external/llvm/lib/Target/AVR/ |
| D | AVRRegisterInfo.cpp | 186 .addReg(DstReg, RegState::Kill) in eliminateFrameIndex()
214 .addReg(AVR::R29R28, RegState::Kill) in eliminateFrameIndex()
221 .addReg(AVR::R0, RegState::Kill); in eliminateFrameIndex()
226 .addReg(AVR::R29R28, RegState::Kill) in eliminateFrameIndex()
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| /external/llvm-project/llvm/lib/CodeGen/ |
| D | LiveRangeCalc.cpp | 74 if (I.Kill.isValid()) in updateFromLiveIns()
76 End = I.Kill; in updateFromLiveIns()
322 LiveIn.back().Kill = Use; in findReachingDefs()
408 if (I.Kill.isValid()) { in updateSSA()
410 LR.addSegment(LiveInterval::Segment(Start, I.Kill, VNI)); in updateSSA()
421 if (I.Kill.isValid()) in updateSSA()
|