| /external/llvm-project/llvm/include/llvm/IR/ |
| D | InlineAsm.h | 232 Kind_RegDef = 2, // Output register, "=r". enumerator
276 static bool isRegDefKind(unsigned Flag){ return getKind(Flag) == Kind_RegDef;} in isRegDefKind()
392 case InlineAsm::Kind_RegDef: in getKindName()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/IR/ |
| D | InlineAsm.h | 231 Kind_RegDef = 2, // Output register, "=r". enumerator
275 static bool isRegDefKind(unsigned Flag){ return getKind(Flag) == Kind_RegDef;} in isRegDefKind()
|
| /external/llvm/include/llvm/IR/ |
| D | InlineAsm.h | 232 Kind_RegDef = 2, // Output register, "=r". enumerator
316 static bool isRegDefKind(unsigned Flag){ return getKind(Flag) == Kind_RegDef;} in isRegDefKind()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Sparc/ |
| D | SparcISelDAGToDAG.cpp | 211 if (Kind != InlineAsm::Kind_RegUse && Kind != InlineAsm::Kind_RegDef in tryInlineAsm()
229 if (Kind == InlineAsm::Kind_RegDef || in tryInlineAsm()
|
| /external/llvm-project/llvm/lib/Target/Sparc/ |
| D | SparcISelDAGToDAG.cpp | 211 if (Kind != InlineAsm::Kind_RegUse && Kind != InlineAsm::Kind_RegDef in tryInlineAsm()
229 if (Kind == InlineAsm::Kind_RegDef || in tryInlineAsm()
|
| /external/llvm/lib/Target/Sparc/ |
| D | SparcISelDAGToDAG.cpp | 212 if (Kind != InlineAsm::Kind_RegUse && Kind != InlineAsm::Kind_RegDef in tryInlineAsm()
230 if (Kind == InlineAsm::Kind_RegDef || in tryInlineAsm()
|
| /external/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| D | InlineAsmLowering.cpp | 409 : InlineAsm::Kind_RegDef, in lowerInlineAsm()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
| D | MachineInstr.cpp | 858 InlineAsm::getKind(Flag) == InlineAsm::Kind_RegDef || in getRegClassConstraint()
1623 case InlineAsm::Kind_RegDef: OS << ":[regdef"; break; in print()
|
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | InstrEmitter.cpp | 975 case InlineAsm::Kind_RegDef: in EmitSpecialNode()
|
| D | SelectionDAGBuilder.cpp | 6862 : InlineAsm::Kind_RegDef, in visitInlineAsm()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | InstrEmitter.cpp | 1088 case InlineAsm::Kind_RegDef: in EmitSpecialNode()
|
| D | SelectionDAGBuilder.cpp | 8292 : InlineAsm::Kind_RegDef, in visitInlineAsm()
|
| /external/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| D | InstrEmitter.cpp | 1185 case InlineAsm::Kind_RegDef: in EmitSpecialNode()
|
| D | SelectionDAGBuilder.cpp | 8354 : InlineAsm::Kind_RegDef, in visitInlineAsm()
|
| /external/llvm/lib/Target/X86/ |
| D | X86FloatingPoint.cpp | 1494 case InlineAsm::Kind_RegDef: in handleSpecialFP()
|
| /external/llvm-project/llvm/lib/Target/X86/ |
| D | X86FloatingPoint.cpp | 1559 case InlineAsm::Kind_RegDef: in handleSpecialFP()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86FloatingPoint.cpp | 1556 case InlineAsm::Kind_RegDef: in handleSpecialFP()
|
| /external/llvm-project/llvm/lib/CodeGen/ |
| D | MachineInstr.cpp | 902 InlineAsm::getKind(Flag) == InlineAsm::Kind_RegDef || in getRegClassConstraint()
|
| /external/llvm/lib/CodeGen/ |
| D | MachineInstr.cpp | 1820 case InlineAsm::Kind_RegDef: OS << ":[regdef"; break; in print()
|
| /external/llvm/lib/Target/ARM/ |
| D | ARMISelDAGToDAG.cpp | 4238 if (Kind != InlineAsm::Kind_RegUse && Kind != InlineAsm::Kind_RegDef in tryInlineAsm()
4256 if (Kind == InlineAsm::Kind_RegDef || in tryInlineAsm()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | ARMISelDAGToDAG.cpp | 4945 if (Kind != InlineAsm::Kind_RegUse && Kind != InlineAsm::Kind_RegDef in tryInlineAsm()
4963 if (Kind == InlineAsm::Kind_RegDef || in tryInlineAsm()
|
| /external/llvm-project/llvm/lib/Target/ARM/ |
| D | ARMISelDAGToDAG.cpp | 5331 if (Kind != InlineAsm::Kind_RegUse && Kind != InlineAsm::Kind_RegDef in tryInlineAsm()
5349 if (Kind == InlineAsm::Kind_RegDef || in tryInlineAsm()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/ |
| D | HexagonISelLowering.cpp | 657 case InlineAsm::Kind_RegDef: in LowerINLINEASM()
|
| /external/llvm-project/llvm/lib/Target/Hexagon/ |
| D | HexagonISelLowering.cpp | 665 case InlineAsm::Kind_RegDef: in LowerINLINEASM()
|
| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonISelLowering.cpp | 977 case InlineAsm::Kind_RegDef: in LowerINLINEASM()
|