/external/llvm-project/llvm/include/llvm/IR/ |
D | InlineAsm.h | 233 Kind_RegDefEarlyClobber = 3, // Early-clobber output register, "=&r". enumerator 280 return getKind(Flag) == Kind_RegDefEarlyClobber; in isRegDefEarlyClobberKind() 394 case InlineAsm::Kind_RegDefEarlyClobber: in getKindName()
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/external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/IR/ |
D | InlineAsm.h | 232 Kind_RegDefEarlyClobber = 3, // Early-clobber output register, "=&r". enumerator 279 return getKind(Flag) == Kind_RegDefEarlyClobber; in isRegDefEarlyClobberKind()
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/external/llvm/include/llvm/IR/ |
D | InlineAsm.h | 233 Kind_RegDefEarlyClobber = 3, // Early-clobber output register, "=&r". enumerator 320 return getKind(Flag) == Kind_RegDefEarlyClobber; in isRegDefEarlyClobberKind()
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Sparc/ |
D | SparcISelDAGToDAG.cpp | 212 && Kind != InlineAsm::Kind_RegDefEarlyClobber) in tryInlineAsm() 230 Kind == InlineAsm::Kind_RegDefEarlyClobber) { in tryInlineAsm()
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/external/llvm-project/llvm/lib/Target/Sparc/ |
D | SparcISelDAGToDAG.cpp | 212 && Kind != InlineAsm::Kind_RegDefEarlyClobber) in tryInlineAsm() 230 Kind == InlineAsm::Kind_RegDefEarlyClobber) { in tryInlineAsm()
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/external/llvm/lib/Target/Sparc/ |
D | SparcISelDAGToDAG.cpp | 213 && Kind != InlineAsm::Kind_RegDefEarlyClobber) in tryInlineAsm() 231 Kind == InlineAsm::Kind_RegDefEarlyClobber) { in tryInlineAsm()
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/external/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
D | InlineAsmLowering.cpp | 408 OpInfo.isEarlyClobber ? InlineAsm::Kind_RegDefEarlyClobber in lowerInlineAsm()
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
D | MachineInstr.cpp | 859 InlineAsm::getKind(Flag) == InlineAsm::Kind_RegDefEarlyClobber) && in getRegClassConstraint() 1624 case InlineAsm::Kind_RegDefEarlyClobber: OS << ":[regdef-ec"; break; in print()
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/external/llvm/lib/CodeGen/SelectionDAG/ |
D | InstrEmitter.cpp | 985 case InlineAsm::Kind_RegDefEarlyClobber: in EmitSpecialNode()
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D | SelectionDAGBuilder.cpp | 6861 ? InlineAsm::Kind_RegDefEarlyClobber in visitInlineAsm()
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/ |
D | InstrEmitter.cpp | 1099 case InlineAsm::Kind_RegDefEarlyClobber: in EmitSpecialNode()
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D | SelectionDAGBuilder.cpp | 8291 OpInfo.isEarlyClobber ? InlineAsm::Kind_RegDefEarlyClobber in visitInlineAsm()
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/external/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
D | InstrEmitter.cpp | 1196 case InlineAsm::Kind_RegDefEarlyClobber: in EmitSpecialNode()
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D | SelectionDAGBuilder.cpp | 8353 OpInfo.isEarlyClobber ? InlineAsm::Kind_RegDefEarlyClobber in visitInlineAsm()
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/external/llvm/lib/Target/X86/ |
D | X86FloatingPoint.cpp | 1495 case InlineAsm::Kind_RegDefEarlyClobber: in handleSpecialFP()
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/external/llvm-project/llvm/lib/Target/X86/ |
D | X86FloatingPoint.cpp | 1560 case InlineAsm::Kind_RegDefEarlyClobber: in handleSpecialFP()
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
D | X86FloatingPoint.cpp | 1557 case InlineAsm::Kind_RegDefEarlyClobber: in handleSpecialFP()
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/external/llvm-project/llvm/lib/CodeGen/ |
D | MachineInstr.cpp | 903 InlineAsm::getKind(Flag) == InlineAsm::Kind_RegDefEarlyClobber) && in getRegClassConstraint()
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/external/llvm/lib/CodeGen/ |
D | MachineInstr.cpp | 1821 case InlineAsm::Kind_RegDefEarlyClobber: OS << ":[regdef-ec"; break; in print()
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/external/llvm/lib/Target/ARM/ |
D | ARMISelDAGToDAG.cpp | 4239 && Kind != InlineAsm::Kind_RegDefEarlyClobber) in tryInlineAsm() 4257 Kind == InlineAsm::Kind_RegDefEarlyClobber) { in tryInlineAsm()
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
D | ARMISelDAGToDAG.cpp | 4946 && Kind != InlineAsm::Kind_RegDefEarlyClobber) in tryInlineAsm() 4964 Kind == InlineAsm::Kind_RegDefEarlyClobber) { in tryInlineAsm()
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/external/llvm-project/llvm/lib/Target/ARM/ |
D | ARMISelDAGToDAG.cpp | 5332 && Kind != InlineAsm::Kind_RegDefEarlyClobber) in tryInlineAsm() 5350 Kind == InlineAsm::Kind_RegDefEarlyClobber) { in tryInlineAsm()
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/ |
D | HexagonISelLowering.cpp | 658 case InlineAsm::Kind_RegDefEarlyClobber: { in LowerINLINEASM()
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/external/llvm-project/llvm/lib/Target/Hexagon/ |
D | HexagonISelLowering.cpp | 666 case InlineAsm::Kind_RegDefEarlyClobber: { in LowerINLINEASM()
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/external/llvm/lib/Target/Hexagon/ |
D | HexagonISelLowering.cpp | 985 case InlineAsm::Kind_RegDefEarlyClobber: { in LowerINLINEASM()
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