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/external/libcxx/test/std/thread/thread.mutex/thread.lock.algorithm/
Dlock.pass.cpp27 class L0 class
32 L0() : locked_(false) {} in L0() function in L0
99 L0 l0; in main()
100 L0 l1; in main()
106 L0 l0; in main()
114 L0 l1; in main()
121 L0 l0; in main()
136 L0 l1; in main()
193 L0 l0; in main()
194 L0 l1; in main()
[all …]
Dtry_lock.pass.cpp22 class L0 class
27 L0() : locked_(false) {} in L0() function in L0
79 L0 l0; in main()
80 L0 l1; in main()
86 L0 l0; in main()
94 L0 l1; in main()
101 L0 l0; in main()
116 L0 l1; in main()
131 L0 l0; in main()
132 L0 l1; in main()
[all …]
/external/llvm-project/libcxx/test/std/thread/thread.mutex/thread.lock.algorithm/
Dlock.pass.cpp26 class L0 class
31 L0() : locked_(false) {} in L0() function in L0
98 L0 l0; in main()
99 L0 l1; in main()
105 L0 l0; in main()
113 L0 l1; in main()
120 L0 l0; in main()
135 L0 l1; in main()
192 L0 l0; in main()
193 L0 l1; in main()
[all …]
Dtry_lock.pass.cpp21 class L0 class
26 L0() : locked_(false) {} in L0() function in L0
78 L0 l0; in main()
79 L0 l1; in main()
85 L0 l0; in main()
93 L0 l1; in main()
100 L0 l0; in main()
115 L0 l1; in main()
130 L0 l0; in main()
131 L0 l1; in main()
[all …]
/external/deqp-deps/SPIRV-Tools/test/
Dext_inst.debuginfo_test.cpp71 #define CASE_ILL(Enum, L0, L1) \ argument
73 uint32_t(DebugInfoDebug##Enum), "Debug" #Enum, " %4 " #L0 " " #L1, { \
74 4, L0, L1 \
78 #define CASE_IL(Enum, L0) \ argument
80 uint32_t(DebugInfoDebug##Enum), "Debug" #Enum, " %4 " #L0, { 4, L0 } \
126 #define CASE_IIILLI(Enum, L0, L1) \ argument
129 " %4 %5 %6 " #L0 " " #L1 " %7", { \
130 4, 5, 6, L0, L1, 7 \
134 #define CASE_IIILLIL(Enum, L0, L1, L2) \ argument
137 " %4 %5 %6 " #L0 " " #L1 " %7 " #L2, { \
[all …]
Dext_inst.cldebug100_test.cpp179 #define CASE_ILL(Enum, L0, L1) \ argument
182 " %4 " #L0 " " #L1, { \
183 4, L0, L1 \
187 #define CASE_IL(Enum, L0) \ argument
189 uint32_t(OpenCLDebugInfo100Debug##Enum), EPREFIX #Enum, " %4 " #L0, { \
190 4, L0 \
242 #define CASE_IIILLI(Enum, L0, L1) \ argument
245 " %4 %5 %6 " #L0 " " #L1 " %7", { \
246 4, 5, 6, L0, L1, 7 \
250 #define CASE_IIILLIF(Enum, L0, L1, Fstr, Fnum) \ argument
[all …]
/external/swiftshader/third_party/SPIRV-Tools/test/
Dext_inst.debuginfo_test.cpp71 #define CASE_ILL(Enum, L0, L1) \ argument
73 uint32_t(DebugInfoDebug##Enum), "Debug" #Enum, " %4 " #L0 " " #L1, { \
74 4, L0, L1 \
78 #define CASE_IL(Enum, L0) \ argument
80 uint32_t(DebugInfoDebug##Enum), "Debug" #Enum, " %4 " #L0, { 4, L0 } \
126 #define CASE_IIILLI(Enum, L0, L1) \ argument
129 " %4 %5 %6 " #L0 " " #L1 " %7", { \
130 4, 5, 6, L0, L1, 7 \
134 #define CASE_IIILLIL(Enum, L0, L1, L2) \ argument
137 " %4 %5 %6 " #L0 " " #L1 " %7 " #L2, { \
[all …]
Dext_inst.cldebug100_test.cpp179 #define CASE_ILL(Enum, L0, L1) \ argument
182 " %4 " #L0 " " #L1, { \
183 4, L0, L1 \
187 #define CASE_IL(Enum, L0) \ argument
189 uint32_t(OpenCLDebugInfo100Debug##Enum), EPREFIX #Enum, " %4 " #L0, { \
190 4, L0 \
242 #define CASE_IIILLI(Enum, L0, L1) \ argument
245 " %4 %5 %6 " #L0 " " #L1 " %7", { \
246 4, 5, 6, L0, L1, 7 \
250 #define CASE_IIILLIF(Enum, L0, L1, Fstr, Fnum) \ argument
[all …]
/external/angle/third_party/vulkan-deps/spirv-tools/src/test/
Dext_inst.debuginfo_test.cpp71 #define CASE_ILL(Enum, L0, L1) \ argument
73 uint32_t(DebugInfoDebug##Enum), "Debug" #Enum, " %4 " #L0 " " #L1, { \
74 4, L0, L1 \
78 #define CASE_IL(Enum, L0) \ argument
80 uint32_t(DebugInfoDebug##Enum), "Debug" #Enum, " %4 " #L0, { 4, L0 } \
126 #define CASE_IIILLI(Enum, L0, L1) \ argument
129 " %4 %5 %6 " #L0 " " #L1 " %7", { \
130 4, 5, 6, L0, L1, 7 \
134 #define CASE_IIILLIL(Enum, L0, L1, L2) \ argument
137 " %4 %5 %6 " #L0 " " #L1 " %7 " #L2, { \
[all …]
Dext_inst.cldebug100_test.cpp179 #define CASE_ILL(Enum, L0, L1) \ argument
182 " %4 " #L0 " " #L1, { \
183 4, L0, L1 \
187 #define CASE_IL(Enum, L0) \ argument
189 uint32_t(OpenCLDebugInfo100Debug##Enum), EPREFIX #Enum, " %4 " #L0, { \
190 4, L0 \
242 #define CASE_IIILLI(Enum, L0, L1) \ argument
245 " %4 %5 %6 " #L0 " " #L1 " %7", { \
246 4, 5, 6, L0, L1, 7 \
250 #define CASE_IIILLIF(Enum, L0, L1, Fstr, Fnum) \ argument
[all …]
/external/llvm-project/llvm/test/MC/MachO/
Ddarwin-x86_64-reloc-offsets.s6 L0: label
60 movb $0x12, L0(%rip)
63 movb $0x12, L0 + 1(%rip)
66 movl $0x12345678, L0(%rip)
69 movl $0x12345678, L0 + 1(%rip)
72 movl $0x12345678, L0 + 2(%rip)
75 movl $0x12345678, L0 + 3(%rip)
78 movl $0x12345678, L0 + 4(%rip)
80 movb %al, L0(%rip)
81 movb %al, L0 + 1(%rip)
[all …]
/external/llvm/test/MC/MachO/
Ddarwin-x86_64-reloc-offsets.s6 L0: label
60 movb $0x12, L0(%rip)
63 movb $0x12, L0 + 1(%rip)
66 movl $0x12345678, L0(%rip)
69 movl $0x12345678, L0 + 1(%rip)
72 movl $0x12345678, L0 + 2(%rip)
75 movl $0x12345678, L0 + 3(%rip)
78 movl $0x12345678, L0 + 4(%rip)
80 movb %al, L0(%rip)
81 movb %al, L0 + 1(%rip)
[all …]
/external/llvm/test/Transforms/LoopSimplify/
Dindirectbr.ll2 ; RUN: | grep -F "indirectbr i8* %x, [label %L0, label %L1]" \
9 indirectbr i8* %x, [ label %L0, label %L1 ]
11 L0:
12 br label %L0
20 br label %L0
22 L0:
26 indirectbr i8* %x, [ label %L0, label %L1 ]
35 indirectbr i8* %x, [ label %L0, label %L1 ]
37 L0:
50 indirectbr i8* %x, [ label %L0, label %L1 ]
[all …]
/external/llvm-project/llvm/test/Transforms/LoopSimplify/
Dindirectbr.ll2 ; RUN: | grep -F "indirectbr i8* %x, [label %L0, label %L1]" \
9 indirectbr i8* %x, [ label %L0, label %L1 ]
11 L0:
12 br label %L0
20 br label %L0
22 L0:
26 indirectbr i8* %x, [ label %L0, label %L1 ]
35 indirectbr i8* %x, [ label %L0, label %L1 ]
37 L0:
50 indirectbr i8* %x, [ label %L0, label %L1 ]
[all …]
/external/llvm-project/llvm/test/CodeGen/WebAssembly/
Di32.ll14 ; CHECK-NEXT: local.get $push[[L0:[0-9]+]]=, 0{{$}}
16 ; CHECK-NEXT: i32.add $push0=, $pop[[L0]], $pop[[L1]]{{$}}
25 ; CHECK-NEXT: local.get $push[[L0:[0-9]+]]=, 0{{$}}
27 ; CHECK-NEXT: i32.sub $push0=, $pop[[L0]], $pop[[L1]]{{$}}
36 ; CHECK-NEXT: local.get $push[[L0:[0-9]+]]=, 0{{$}}
38 ; CHECK-NEXT: i32.mul $push0=, $pop[[L0]], $pop[[L1]]{{$}}
47 ; CHECK-NEXT: local.get $push[[L0:[0-9]+]]=, 0{{$}}
49 ; CHECK-NEXT: i32.div_s $push0=, $pop[[L0]], $pop[[L1]]{{$}}
58 ; CHECK-NEXT: local.get $push[[L0:[0-9]+]]=, 0{{$}}
60 ; CHECK-NEXT: i32.div_u $push0=, $pop[[L0]], $pop[[L1]]{{$}}
[all …]
Di64.ll14 ; CHECK-NEXT: local.get $push[[L0:[0-9]+]]=, 0{{$}}
16 ; CHECK-NEXT: i64.add $push0=, $pop[[L0]], $pop[[L1]]{{$}}
25 ; CHECK-NEXT: local.get $push[[L0:[0-9]+]]=, 0{{$}}
27 ; CHECK-NEXT: i64.sub $push0=, $pop[[L0]], $pop[[L1]]{{$}}
36 ; CHECK-NEXT: local.get $push[[L0:[0-9]+]]=, 0{{$}}
38 ; CHECK-NEXT: i64.mul $push0=, $pop[[L0]], $pop[[L1]]{{$}}
47 ; CHECK-NEXT: local.get $push[[L0:[0-9]+]]=, 0{{$}}
49 ; CHECK-NEXT: i64.div_s $push0=, $pop[[L0]], $pop[[L1]]{{$}}
58 ; CHECK-NEXT: local.get $push[[L0:[0-9]+]]=, 0{{$}}
60 ; CHECK-NEXT: i64.div_u $push0=, $pop[[L0]], $pop[[L1]]{{$}}
[all …]
Dcomparisons-i32.ll11 ; CHECK-NEXT: local.get $push[[L0:[0-9]+]]=, 0{{$}}
13 ; CHECK-NEXT: i32.eq $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
25 ; CHECK: i32.ne $push[[L0:[0-9]+]]=, $pop{{[0-9]+}}, $pop{{[0-9]+}}{{$}}
26 ; SLOW-NEXT: return $pop[[L0]]{{$}}
28 ; FAST-NEXT: i32.and $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
37 ; CHECK: i32.lt_s $push[[L0:[0-9]+]]=, $pop{{[0-9]+}}, $pop{{[0-9]+}}{{$}}
38 ; SLOW-NEXT: return $pop[[L0]]{{$}}
40 ; FAST-NEXT: i32.and $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
49 ; CHECK: i32.le_s $push[[L0:[0-9]+]]=, $pop{{[0-9]+}}, $pop{{[0-9]+}}{{$}}
50 ; SLOW-NEXT: return $pop[[L0]]{{$}}
[all …]
Dcomparisons-i64.ll11 ; CHECK-NEXT: local.get $push[[L0:[0-9]+]]=, 0{{$}}
13 ; CHECK-NEXT: i64.eq $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
25 ; CHECK: i64.ne $push[[L0:[0-9]+]]=, $pop{{[0-9]+}}, $pop{{[0-9]+}}{{$}}
26 ; SLOW-NEXT: return $pop[[L0]]{{$}}
28 ; FAST-NEXT: i32.and $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
37 ; CHECK: i64.lt_s $push[[L0:[0-9]+]]=, $pop{{[0-9]+}}, $pop{{[0-9]+}}{{$}}
38 ; SLOW-NEXT: return $pop[[L0]]{{$}}
40 ; FAST-NEXT: i32.and $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
49 ; CHECK: i64.le_s $push[[L0:[0-9]+]]=, $pop{{[0-9]+}}, $pop{{[0-9]+}}{{$}}
50 ; SLOW-NEXT: return $pop[[L0]]{{$}}
[all …]
Dload-store-pic.ll22 ; PIC: global.get $push[[L0:[0-9]+]]=, __memory_base{{$}}
24 ; PIC-NEXT: i32.add $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
34 ; PIC: global.get $push[[L0:[0-9]+]]=, __memory_base{{$}}
36 ; PIC-NEXT: i32.add $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1:[0-9]+]]{{$}}
51 ; PIC: global.get $push[[L0:[0-9]+]]=, __memory_base{{$}}
53 ; PIC-NEXT: i32.add $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
63 ; PIC: global.get $push[[L0:[0-9]+]]=, __memory_base{{$}}
65 ; PIC-NEXT: i32.add $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
83 ; PIC: global.get $push[[L0:[0-9]+]]=, external_global@GOT{{$}}
84 ; PIC-NEXT: i32.load $push{{[0-9]+}}=, 0($pop[[L0]]){{$}}
[all …]
Dunsupported-function-bitcasts.ll13 ; CHECK: i32.const $push[[L0:[0-9]+]]=, 0{{$}}
14 ; CHECK-NEXT: call $push[[L1:[0-9]+]]=, .Lhas_i64_arg_bitcast_invalid.2, $pop[[L0]]{{$}}
16 ; CHECK-NEXT: i64.const $push[[L0:[0-9]+]]=, 0{{$}}
17 ; CHECK-NEXT: call $push[[L1:[0-9]+]]=, .Lhas_i64_arg_bitcast_invalid, $pop[[L0]]{{$}}
35 ; CHECK: i32.const $push[[L0:[0-9]+]]=, 2{{$}}
36 ; CHECK-NEXT: call $push[[L1:[0-9]+]]=, .Lhas_ptr_arg_bitcast_invalid.4, $pop[[L0]]{{$}}
38 ; CHECK-NEXT: i32.const $push[[L0:[0-9]+]]=, 2{{$}}
39 ; CHECK-NEXT: call $push[[L1:[0-9]+]]=, has_ptr_arg, $pop[[L0]]{{$}}
41 ; CHECK-NEXT: i64.const $push[[L0:[0-9]+]]=, 3{{$}}
42 ; CHECK-NEXT: call $push[[L1:[0-9]+]]=, .Lhas_ptr_arg_bitcast_invalid, $pop[[L0]]{{$}}
/external/boringssl/src/util/fipstools/delocate/testdata/x86_64-LargeMemory/
Dout.s8 .L0: label
10 leaq .L0(%rip), %rax
11 # WAS movabsq $_GLOBAL_OFFSET_TABLE_-.L0, %rcx
13 addq $.Lboringssl_got_delta-.L0, %rcx
22 .L0$pb:
24 leaq .L0$pb(%rip), %rax
25 # WAS movabsq $_GLOBAL_OFFSET_TABLE_-.L0$pb, %rcx
27 addq $.Lboringssl_got_delta-.L0$pb, %rcx
Din.s4 .L0: label
5 leaq .L0(%rip), %rax
6 movabsq $_GLOBAL_OFFSET_TABLE_-.L0, %rcx
14 .L0$pb:
15 leaq .L0$pb(%rip), %rax
16 movabsq $_GLOBAL_OFFSET_TABLE_-.L0$pb, %rcx
/external/llvm-project/llvm/test/Transforms/JumpThreading/
Dfold-not-thread.ll13 ; Make sure we update the phi node properly here, i.e. we only have 2 predecessors, entry and L0
14 ; CHECK: %res.0 = phi i32 [ 0, %L0 ], [ 1, %entry ]
18 br i1 %cmp, label %L0, label %L1
19 L0:
39 %res.0 = phi i32 [ 0, %L0 ], [ 0, %L0 ], [1, %entry]
48 ; L0 is too big to duplicate. L2 is the unreachable block here.
59 br i1 %cond, label %L0, label %L3
60 L0:
89 ; L0 is too big to duplicate. L2 is the unreachable block here.
104 br i1 %cond, label %L0, label %L3
[all …]
/external/llvm-project/llvm/test/CodeGen/ARM/
Dtail-merge-branch-weight.ll5 ; p(L0_L1 -> L2) = p(entry -> L0) * p(L0 -> L2) + p(entry -> L1) * p(L1 -> L2)
7 ; p(L0_L1 -> L3) = p(entry -> L0) * p(L0 -> L3) + p(entry -> L1) * p(L1 -> L3)
17 br i1 %cmp, label %L0, label %L1, !prof !0
19 L0: ; preds = %entry
31 L2: ; preds = %L1, %L0
34 L3: ; preds = %L0, %L1, %L2
35 %retval.0 = phi i32 [ 100, %L2 ], [ 6, %L1 ], [ 6, %L0 ]
/external/llvm/test/CodeGen/ARM/
Dtail-merge-branch-weight.ll6 ; p(L0_L1 -> L2) = p(entry -> L0) * p(L0 -> L2) + p(entry -> L1) * p(L1 -> L2)
8 ; p(L0_L1 -> L3) = p(entry -> L0) * p(L0 -> L3) + p(entry -> L1) * p(L1 -> L3)
20 br i1 %cmp, label %L0, label %L1, !prof !0
22 L0: ; preds = %entry
34 L2: ; preds = %L1, %L0
37 L3: ; preds = %L0, %L1, %L2
38 %retval.0 = phi i32 [ 100, %L2 ], [ 6, %L1 ], [ 6, %L0 ]

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