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Searched refs:L128 (Results 1 – 23 of 23) sorted by relevance

/external/llvm-project/lldb/test/Shell/Expr/Inputs/
Dir-memory-map-mix-malloc-free236 L128 = malloc 2048 16
264 free L128
/external/skqp/src/compute/hs/images/
Dhs_intel_gen8_mkeys.svg1 …L128.96562 507.83124Q128.96562 509.20624 129.35625 509.8781Q129.7625 510.53436 130.575 510.53436Q1…
/external/speex/libspeexdsp/
Dsmallft.c1049 if(nbd<l1)goto L128; in dradbg()
1075 L128: in dradbg()
/external/skia/src/core/
DSkVM.h394 enum L { L128, L256 }; // Is this a 128- or 256-bit operation? Intel Vol 2A 2.3.6.2 enumerator
400 void op(int p, int m, int o, Xmm d, Xmm x, Operand y, W w=W0) { op(p,m,o, d,x,y,w,L128); }
401 void op(int p, int m, int o, Xmm d, Operand y, W w=W0) { op(p,m,o, d,0,y,w,L128); }
/external/llvm/lib/Target/SystemZ/
DSystemZInstrInfo.cpp1036 case SystemZ::L128: in expandPostRAPseudo()
1271 LoadOpcode = SystemZ::L128; in getLoadStoreOpcodes()
DSystemZInstrInfo.td501 def L128 : Pseudo<(outs GR128:$dst), (ins bdxaddr20only128:$src),
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/SystemZ/
DSystemZInstrInfo.cpp1227 case SystemZ::L128: in expandPostRAPseudo()
1484 LoadOpcode = SystemZ::L128; in getLoadStoreOpcodes()
DSystemZScheduleZEC12.td183 def : InstRW<[LSULatency, LSU, NormalGr], (instregex "L128$")>;
DSystemZScheduleZ196.td178 def : InstRW<[LSULatency, LSU, NormalGr], (instregex "L128$")>;
DSystemZScheduleZ13.td200 def : InstRW<[LSULatency, LSU, NormalGr], (instregex "L128$")>;
DSystemZScheduleZ14.td201 def : InstRW<[LSULatency, LSU, NormalGr], (instregex "L128$")>;
DSystemZScheduleZ15.td202 def : InstRW<[LSULatency, LSU, NormalGr], (instregex "L128$")>;
DSystemZInstrInfo.td409 def L128 : Pseudo<(outs GR128:$dst), (ins bdxaddr20only128:$src),
/external/llvm-project/llvm/lib/Target/SystemZ/
DSystemZInstrInfo.cpp1332 case SystemZ::L128: in expandPostRAPseudo()
1589 LoadOpcode = SystemZ::L128; in getLoadStoreOpcodes()
DSystemZScheduleZ196.td178 def : InstRW<[LSULatency, LSU, NormalGr], (instregex "L128$")>;
DSystemZScheduleZEC12.td183 def : InstRW<[LSULatency, LSU, NormalGr], (instregex "L128$")>;
DSystemZScheduleZ13.td200 def : InstRW<[LSULatency, LSU, NormalGr], (instregex "L128$")>;
DSystemZScheduleZ14.td201 def : InstRW<[LSULatency, LSU, NormalGr], (instregex "L128$")>;
DSystemZScheduleZ15.td202 def : InstRW<[LSULatency, LSU, NormalGr], (instregex "L128$")>;
DSystemZInstrInfo.td428 def L128 : Pseudo<(outs GR128:$dst), (ins bdxaddr20only128:$src),
/external/llvm-project/llvm/test/CodeGen/X86/
Dabi-isel.ll10460 ; LINUX-32-PIC-NEXT: calll .L128$pb
10461 ; LINUX-32-PIC-NEXT: .L128$pb:
10464 ; LINUX-32-PIC-NEXT: addl $_GLOBAL_OFFSET_TABLE_+(.Ltmp128-.L128$pb), %eax
10489 ; DARWIN-32-PIC-NEXT: calll L128$pb
10490 ; DARWIN-32-PIC-NEXT: L128$pb:
10493 ; DARWIN-32-PIC-NEXT: leal (_lsrc-L128$pb)+262144(%eax,%ecx,4), %eax
/external/capstone/arch/SystemZ/
DSystemZGenAsmWriter.inc2493 0U, // L128
5296 0U, // L128
8099 0U, // L128
/external/llvm/test/CodeGen/X86/
Dabi-isel.ll8209 ; DARWIN-32-PIC: calll L128$pb
8210 ; DARWIN-32-PIC-NEXT: L128$pb:
8213 ; DARWIN-32-PIC-NEXT: leal (_lsrc-L128$pb)+262144([[EAX]],[[ECX]],4), %eax