/external/llvm/test/CodeGen/XCore/ |
D | codemodel.ll | 9 ; RUN: llc < %s -march=xcore -code-model=large | FileCheck %s -check-prefix=LARGE 20 ; LARGE-LABEL: test: 21 ; LARGE: zext r0, 1 22 ; LARGE: ldaw r11, cp[.LCPI{{[0-9_]*}}] 23 ; LARGE: mov r1, r11 24 ; LARGE: ldaw r11, cp[.LCPI{{[0-9_]*}}] 25 ; LARGE: bt r0, [[JUMP:.LBB[0-9_]*]] 26 ; LARGE: mov r11, r1 27 ; LARGE: [[JUMP]] 28 ; LARGE: ldw r0, r11[0] [all …]
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/external/llvm-project/llvm/test/CodeGen/XCore/ |
D | codemodel.ll | 10 ; RUN: llc < %s -march=xcore -code-model=large | FileCheck %s -check-prefix=LARGE 21 ; LARGE-LABEL: test: 22 ; LARGE: zext r0, 1 23 ; LARGE: ldaw r11, cp[.LCPI{{[0-9_]*}}] 24 ; LARGE: mov r1, r11 25 ; LARGE: ldaw r11, cp[.LCPI{{[0-9_]*}}] 26 ; LARGE: bt r0, [[JUMP:.LBB[0-9_]*]] 27 ; LARGE: mov r11, r1 28 ; LARGE: [[JUMP]] 29 ; LARGE: ldw r0, r11[0] [all …]
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/external/llvm-project/llvm/test/CodeGen/PowerPC/ |
D | ppc32-pic-large.ll | 1 …ple=powerpc-unknown-linux-gnu -relocation-model=pic | FileCheck --check-prefixes=LARGE,LARGE-BSS %s 2 …-gnu -mattr=+secure-plt -relocation-model=pic | FileCheck --check-prefixes=LARGE,LARGE-SECUREPLT %s 3 …nknown-netbsd -mattr=+secure-plt -relocation-model=pic | FileCheck -check-prefix=LARGE-SECUREPLT %s 4 … -mtriple=powerpc-unknown-netbsd -relocation-model=pic | FileCheck -check-prefix=LARGE-SECUREPLT %s 5 …known-openbsd -mattr=+secure-plt -relocation-model=pic | FileCheck -check-prefix=LARGE-SECUREPLT %s 6 …-mtriple=powerpc-unknown-openbsd -relocation-model=pic | FileCheck -check-prefix=LARGE-SECUREPLT %s 7 …pc-linux-musl -mattr=+secure-plt -relocation-model=pic | FileCheck -check-prefix=LARGE-SECUREPLT %s 8 ; RUN: llc < %s -mtriple=powerpc-linux-musl -relocation-model=pic | FileCheck -check-prefix=LARGE-S… 34 ; LARGE-BSS: [[POFF:\.L[0-9]+\$poff]]: 35 ; LARGE-BSS-NEXT: .long .LTOC-[[PB:\.L[0-9]+\$pb]] [all …]
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D | aix-lower-jump-table.ll | 7 ; RUN: --check-prefix=32LARGE-MIR %s 15 ; RUN: --check-prefix=64LARGE-MIR %s 21 ; RUN: --check-prefixes=32LARGE-ASM,LARGE-ASM %s 27 ; RUN: --check-prefixes=64LARGE-ASM,LARGE-ASM %s 70 ; 32LARGE-MIR: renamable $r[[REG1:[0-9]+]] = ADDIStocHA $r2, %jump-table.0 71 ; 32LARGE-MIR: renamable $r[[REG2:[0-9]+]] = LWZtocL %jump-table.0, killed renamable $r[[REG1]], im… 72 ; 32LARGE-MIR: renamable $r[[REG4:[0-9]+]] = RLWINM killed renamable $r[[REG3:[0-9]+]], 2, 0, 29 73 ; 32LARGE-MIR: renamable $r[[REG5:[0-9]+]] = LWZX killed renamable $r[[REG4]], renamable $r[[REG2]]… 74 ; 32LARGE-MIR: renamable $r[[REG6:[0-9]+]] = ADD4 killed renamable $r[[REG5]], killed renamable $r[… 81 ; 64LARGE-MIR: renamable $x[[REG1:[0-9]+]] = ADDIStocHA8 $x2, %jump-table.0 [all …]
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D | aix-lower-constant-pool-index.ll | 7 ; RUN: --check-prefix=32LARGE-MIR %s 15 ; RUN: --check-prefix=64LARGE-MIR %s 21 ; RUN: -code-model=large < %s | FileCheck --check-prefixes=32LARGE-ASM,LARGE-ASM %s 27 ; RUN: -code-model=large < %s | FileCheck --check-prefixes=64LARGE-ASM,LARGE-ASM %s 37 ; 32LARGE-MIR: renamable $r[[REG1:[0-9]+]] = ADDIStocHA $r2, %const.0 38 ; 32LARGE-MIR: renamable $r[[REG2:[0-9]+]] = LWZtocL %const.0, killed renamable $r[[REG1]], implici… 39 ; 32LARGE-MIR: renamable $f[[REG3:[0-9]+]] = LFS 0, killed renamable $r[[REG2]] :: (load 4 from con… 44 ; 64LARGE-MIR: renamable $x[[REG1:[0-9]+]] = ADDIStocHA8 $x2, %const.0 45 ; 64LARGE-MIR: renamable $x[[REG2:[0-9]+]] = LDtocL %const.0, killed renamable $x[[REG1]], implicit… 46 ; 64LARGE-MIR: renamable $f[[REG3:[0-9]+]] = LFS 0, killed renamable $x[[REG2]] :: (load 4 from con… [all …]
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D | mcm-3.ll | 2 …tatic -verify-machineinstrs -mcpu=pwr7 -O0 -code-model=large <%s | FileCheck -check-prefix=LARGE %s 31 ; LARGE-LABEL: test_file_static: 32 ; LARGE: addis [[REG1:[0-9]+]], 2, [[VAR:[a-z0-9A-Z_.]+]]@toc@ha 33 ; LARGE: ld [[REG2:[0-9]+]], [[VAR]]@toc@l([[REG1]]) 34 ; LARGE: lwz {{[0-9]+}}, 0([[REG2]]) 35 ; LARGE: stw {{[0-9]+}}, 0([[REG2]]) 36 ; LARGE: .type gi,@object 37 ; LARGE-NEXT: .data 38 ; LARGE-NEXT: .globl gi 39 ; LARGE-NEXT: .p2align 2 [all …]
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D | mcm-4.ll | 6 ; RUN: -fast-isel=false -mattr=-vsx <%s | FileCheck -check-prefix=LARGE %s 8 ; RUN: -fast-isel=false -mattr=+vsx <%s | FileCheck -check-prefix=LARGE-VSX %s 12 ; RUN: -fast-isel=false -mattr=+vsx <%s | FileCheck -check-prefix=LARGE-P9 %s 38 ; LARGE: [[VAR:[a-z0-9A-Z_.]+]]: 39 ; LARGE: .quad 0x3f4fd4920b498cf0 40 ; LARGE-LABEL: test_double_const: 41 ; LARGE: addis [[REG1:[0-9]+]], 2, [[VAR2:[a-z0-9A-Z_.]+]]@toc@ha 42 ; LARGE: ld [[REG2:[0-9]+]], [[VAR2]]@toc@l([[REG1]]) 43 ; LARGE: lfd {{[0-9]+}}, 0([[REG2]]) 45 ; LARGE-VSX: [[VAR:[a-z0-9A-Z_.]+]]: [all …]
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D | lower-globaladdr32-aix-asm.ll | 5 ; RUN: -code-model=large < %s | FileCheck %s --check-prefix=LARGE 20 ; LARGE-LABEL: .test_load:{{$}} 21 ; LARGE: addis [[REG1:[0-9]+]], L..C0@u(2) 22 ; LARGE: lwz [[REG2:[0-9]+]], L..C0@l([[REG1]]) 23 ; LARGE: lwz [[REG3:[0-9]+]], 0([[REG2]]) 24 ; LARGE: blr 38 ; LARGE-LABEL: .test_store:{{$}} 39 ; LARGE: addis [[REG1:[0-9]+]], L..C1@u(2) 40 ; LARGE: lwz [[REG2:[0-9]+]], L..C1@l([[REG1]]) 41 ; LARGE: stw [[REG3:[0-9]+]], 0([[REG2]]) [all …]
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D | aix-lower-block-address.ll | 7 ; RUN: --check-prefix=32LARGE-MIR %s 15 ; RUN: --check-prefix=64LARGE-MIR %s 21 ; RUN: -code-model=large < %s | FileCheck --check-prefixes=32LARGE-ASM,LARGE-ASM %s 27 ; RUN: -code-model=large < %s | FileCheck --check-prefixes=64LARGE-ASM,LARGE-ASM %s 41 ; 32LARGE-MIR: renamable $r[[REG1:[0-9]+]] = ADDIStocHA $r2, blockaddress(@foo, %ir-block.__here) 42 ; 32LARGE-MIR: renamable $r[[REG2:[0-9]+]] = LWZtocL blockaddress(@foo, %ir-block.__here), killed r… 46 ; 64LARGE-MIR: renamable $x[[REG1:[0-9]+]] = ADDIStocHA8 $x2, blockaddress(@foo, %ir-block.__here) 47 ; 64LARGE-MIR: renamable $x[[REG2:[0-9]+]] = LDtocL blockaddress(@foo, %ir-block.__here), killed re… 54 ; 32LARGE-ASM-LABEL: foo 55 ; 32LARGE-ASM: .foo: [all …]
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D | lower-globaladdr64-aix-asm.ll | 5 ; RUN: -code-model=large < %s | FileCheck %s --check-prefix=LARGE 20 ; LARGE-LABEL: .test_load:{{$}} 21 ; LARGE: addis [[REG1:[0-9]+]], L..C0@u(2) 22 ; LARGE: ld [[REG2:[0-9]+]], L..C0@l([[REG1]]) 23 ; LARGE: lwz [[REG3:[0-9]+]], 0([[REG2]]) 24 ; LARGE: blr 38 ; LARGE-LABEL: .test_store:{{$}} 39 ; LARGE: addis [[REG1:[0-9]+]], L..C1@u(2) 40 ; LARGE: ld [[REG2:[0-9]+]], L..C1@l([[REG1]]) 41 ; LARGE: stw [[REG3:[0-9]+]], 0([[REG2]]) [all …]
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D | mcm-2.ll | 2 …: llc -verify-machineinstrs -mcpu=pwr7 -O0 -code-model=large <%s | FileCheck -check-prefix=LARGE %s 28 ; LARGE-LABEL: test_fn_static: 29 ; LARGE: addis [[REG1:[0-9]+]], 2, [[VAR:[a-z0-9A-Z_.]+]]@toc@ha 30 ; LARGE: ld [[REG2:[0-9]+]], [[VAR]]@toc@l([[REG1]]) 31 ; LARGE: lwz {{[0-9]+}}, 0([[REG2]]) 32 ; LARGE: stw {{[0-9]+}}, 0([[REG2]]) 33 ; LARGE: .type test_fn_static.si,@object 34 ; LARGE-NEXT: .lcomm test_fn_static.si,4,4 36 ; LARGE: .section .toc,"aw",@progbits 37 ; LARGE-NEXT: [[VAR]]: [all …]
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/external/llvm-project/llvm/test/CodeGen/X86/ |
D | code-model-elf.ll | 7 …ion-model=static -code-model=large | FileCheck %s --check-prefix=CHECK --check-prefix=LARGE-STATIC 10 …cation-model=pic -code-model=large | FileCheck %s --check-prefix=CHECK --check-prefix=LARGE-PIC 54 ; LARGE-STATIC-LABEL: lea_static_data: 55 ; LARGE-STATIC: # %bb.0: 56 ; LARGE-STATIC-NEXT: movabsq $static_data, %rax 57 ; LARGE-STATIC-NEXT: retq 71 ; LARGE-PIC-LABEL: lea_static_data: 72 ; LARGE-PIC: # %bb.0: 73 ; LARGE-PIC-NEXT: .L0$pb: 74 ; LARGE-PIC-NEXT: leaq .L0${{.*}}(%rip), %rax [all …]
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D | fast-isel-constpool.ll | 3 … -mtriple=x86_64-apple-darwin -fast-isel -code-model=large < %s | FileCheck %s --check-prefix=LARGE 13 …t-isel -code-model=large -mattr=sse2 -show-mc-encoding < %s | FileCheck %s --check-prefix=X86-LARGE 23 ; LARGE-LABEL: constpool_float: 24 ; LARGE: ## %bb.0: 25 ; LARGE-NEXT: movabsq $LCPI0_0, %rax 26 ; LARGE-NEXT: addss (%rax), %xmm0 27 ; LARGE-NEXT: retq 51 ; X86-LARGE-LABEL: constpool_float: 52 ; X86-LARGE: ## %bb.0: 53 ; X86-LARGE-NEXT: pushl %eax ## encoding: [0x50] [all …]
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D | code-model-elf-memset.ll | 10 ; RUN: llc < %s -relocation-model=pic -code-model=large | FileCheck %s --check-prefix=LARGE-PIC 55 ; LARGE-PIC-LABEL: main: 56 ; LARGE-PIC: # %bb.0: # %entry 57 ; LARGE-PIC-NEXT: subq $424, %rsp # imm = 0x1A8 58 ; LARGE-PIC-NEXT: .cfi_def_cfa_offset 432 59 ; LARGE-PIC-NEXT: .L0$pb: 60 ; LARGE-PIC-NEXT: leaq .L0${{.*}}(%rip), %rax 61 ; LARGE-PIC-NEXT: movabsq $_GLOBAL_OFFSET_TABLE_-.L0$pb, %rcx 62 ; LARGE-PIC-NEXT: addq %rax, %rcx 63 ; LARGE-PIC-NEXT: movl $0, {{[0-9]+}}(%rsp) [all …]
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/external/llvm/test/CodeGen/AArch64/ |
D | fast-isel-runtime-libcall.ll | 2 …-fast-isel-abort=1 -code-model=large -verify-machineinstrs < %s | FileCheck %s --check-prefix=LARGE 7 ; LARGE-LABEL: frem_f32 8 ; LARGE: adrp [[REG:x[0-9]+]], _fmodf@GOTPAGE 9 ; LARGE: ldr [[REG]], {{\[}}[[REG]], _fmodf@GOTPAGEOFF{{\]}} 10 ; LARGE-NEXT: blr [[REG]] 18 ; LARGE-LABEL: frem_f64 19 ; LARGE: adrp [[REG:x[0-9]+]], _fmod@GOTPAGE 20 ; LARGE: ldr [[REG]], {{\[}}[[REG]], _fmod@GOTPAGEOFF{{\]}} 21 ; LARGE-NEXT: blr [[REG]] 29 ; LARGE-LABEL: sin_f32 [all …]
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D | literal_pools_float.ll | 2 …le=aarch64-none-linux-gnu -code-model=large -mcpu=cyclone | FileCheck --check-prefix=CHECK-LARGE %s 4 …64-none-linux-gnu -code-model=large -mattr=-fp-armv8 | FileCheck --check-prefix=CHECK-NOFP-LARGE %s 18 ; CHECK-LARGE: movz x[[LITADDR:[0-9]+]], #:abs_g3:[[CURLIT:.LCPI[0-9]+_[0-9]+]] 19 ; CHECK-LARGE: movk x[[LITADDR]], #:abs_g2_nc:[[CURLIT]] 20 ; CHECK-LARGE: movk x[[LITADDR]], #:abs_g1_nc:[[CURLIT]] 21 ; CHECK-LARGE: movk x[[LITADDR]], #:abs_g0_nc:[[CURLIT]] 22 ; CHECK-LARGE: ldr {{s[0-9]+}}, [x[[LITADDR]]] 23 ; CHECK-LARGE: fadd 24 ; CHECK-NOFP-LARGE-NOT: ldr {{s[0-9]+}}, 25 ; CHECK-NOFP-LARGE-NOT: fadd [all …]
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D | fpimm.ll | 2 …el=large -verify-machineinstrs < %s | FileCheck %s --check-prefix=LARGE 3 …=large -fast-isel -fast-isel-abort=1 -verify-machineinstrs < %s | FileCheck %s --check-prefix=LARGE 40 ; LARGE-LABEL: check_float2 41 ; LARGE: mov [[REG:w[0-9]+]], #1078525952 42 ; LARGE-NEXT: movk [[REG]], #4059 43 ; LARGE-NEXT: fmov s0, [[REG]] 48 ; LARGE-LABEL: check_double2 49 ; LARGE: mov [[REG:x[0-9]+]], #4614219293217783808 50 ; LARGE-NEXT: movk [[REG]], #8699, lsl #32 51 ; LARGE-NEXT: movk [[REG]], #21572, lsl #16 [all …]
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D | extern-weak.ll | 3 …-mtriple=aarch64-none-linux-gnu -code-model=large -o - %s | FileCheck --check-prefix=CHECK-LARGE %s 19 ; CHECK-LARGE: movz x0, #:abs_g3:var 20 ; CHECK-LARGE: movk x0, #:abs_g2_nc:var 21 ; CHECK-LARGE: movk x0, #:abs_g1_nc:var 22 ; CHECK-LARGE: movk x0, #:abs_g0_nc:var 40 ; CHECK-LARGE: movz [[ADDR:x[0-9]+]], #:abs_g3:arr_var 41 ; CHECK-LARGE: movk [[ADDR]], #:abs_g2_nc:arr_var 42 ; CHECK-LARGE: movk [[ADDR]], #:abs_g1_nc:arr_var 43 ; CHECK-LARGE: movk [[ADDR]], #:abs_g0_nc:arr_var 54 ; CHECK-LARGE: movz x0, #:abs_g3:defined_weak_var [all …]
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D | arm64-extern-weak.ll | 3 …-mtriple=arm64-none-linux-gnu -code-model=large -o - < %s | FileCheck --check-prefix=CHECK-LARGE %s 18 ; CHECK-LARGE: movz x0, #:abs_g3:var 19 ; CHECK-LARGE: movk x0, #:abs_g2_nc:var 20 ; CHECK-LARGE: movk x0, #:abs_g1_nc:var 21 ; CHECK-LARGE: movk x0, #:abs_g0_nc:var 36 ; CHECK-LARGE: movz [[ARR_VAR:x[0-9]+]], #:abs_g3:arr_var 37 ; CHECK-LARGE: movk [[ARR_VAR]], #:abs_g2_nc:arr_var 38 ; CHECK-LARGE: movk [[ARR_VAR]], #:abs_g1_nc:arr_var 39 ; CHECK-LARGE: movk [[ARR_VAR]], #:abs_g0_nc:arr_var 49 ; CHECK-LARGE: movz x0, #:abs_g3:defined_weak_var [all …]
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/external/llvm-project/llvm/test/CodeGen/AArch64/ |
D | fast-isel-runtime-libcall.ll | 2 …-fast-isel-abort=1 -code-model=large -verify-machineinstrs < %s | FileCheck %s --check-prefix=LARGE 7 ; LARGE-LABEL: frem_f32 8 ; LARGE: adrp [[REG:x[0-9]+]], _fmodf@GOTPAGE 9 ; LARGE: ldr [[REG]], {{\[}}[[REG]], _fmodf@GOTPAGEOFF{{\]}} 10 ; LARGE-NEXT: blr [[REG]] 18 ; LARGE-LABEL: frem_f64 19 ; LARGE: adrp [[REG:x[0-9]+]], _fmod@GOTPAGE 20 ; LARGE: ldr [[REG]], {{\[}}[[REG]], _fmod@GOTPAGEOFF{{\]}} 21 ; LARGE-NEXT: blr [[REG]] 29 ; LARGE-LABEL: sin_f32 [all …]
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D | literal_pools_float.ll | 2 …le=aarch64-none-linux-gnu -code-model=large -mcpu=cyclone | FileCheck --check-prefix=CHECK-LARGE %s 5 …64-none-linux-gnu -code-model=large -mattr=-fp-armv8 | FileCheck --check-prefix=CHECK-NOFP-LARGE %s 24 ; CHECK-LARGE: mov [[W128:w[0-9]+]], #1124073472 25 ; CHECK-LARGE: fmov [[LIT128:s[0-9]+]], [[W128]] 26 ; CHECK-LARGE: fadd 27 ; CHECK-NOFP-LARGE-NOT: ldr {{s[0-9]+}}, 28 ; CHECK-NOFP-LARGE-NOT: fadd 46 ; CHECK-LARGE: movz x[[LITADDR:[0-9]+]], #:abs_g0_nc:[[CURLIT:vardouble]] 47 ; CHECK-LARGE: movk x[[LITADDR]], #:abs_g1_nc:[[CURLIT]] 48 ; CHECK-LARGE: movk x[[LITADDR]], #:abs_g2_nc:[[CURLIT]] [all …]
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/external/llvm/test/CodeGen/PowerPC/ |
D | ppc32-pic-large.ll | 1 … %s -mtriple=powerpc-unknown-linux-gnu -relocation-model=pic | FileCheck -check-prefix=LARGE-BSS %s 15 ; LARGE-BSS: [[POFF:\.L[0-9]+\$poff]]: 16 ; LARGE-BSS-NEXT: .long .LTOC-[[PB:\.L[0-9]+\$pb]] 17 ; LARGE-BSS-NEXT: foo: 18 ; LARGE-BSS: stw 30, -8(1) 19 ; LARGE-BSS: bl [[PB]] 20 ; LARGE-BSS-NEXT: [[PB]]: 21 ; LARGE-BSS: mflr 30 22 ; LARGE-BSS: lwz [[REG:[0-9]+]], [[POFF]]-[[PB]](30) 23 ; LARGE-BSS-NEXT: add 30, [[REG]], 30 [all …]
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D | mcm-3.ll | 2 ; RUN: llc -mcpu=pwr7 -O0 -code-model=large <%s | FileCheck -check-prefix=LARGE %s 31 ; LARGE-LABEL: test_file_static: 32 ; LARGE: addis [[REG1:[0-9]+]], 2, [[VAR:[a-z0-9A-Z_.]+]]@toc@ha 33 ; LARGE: ld [[REG2:[0-9]+]], [[VAR]]@toc@l([[REG1]]) 34 ; LARGE: lwz {{[0-9]+}}, 0([[REG2]]) 35 ; LARGE: stw {{[0-9]+}}, 0([[REG2]]) 36 ; LARGE: [[VAR]]: 37 ; LARGE: .tc [[VAR2:[a-z0-9A-Z_.]+]][TC],[[VAR2]] 38 ; LARGE: .type [[VAR2]],@object 39 ; LARGE: .data [all …]
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D | mcm-4.ll | 3 …mcpu=pwr7 -O0 -code-model=large -fast-isel=false -mattr=-vsx <%s | FileCheck -check-prefix=LARGE %s 4 …=pwr7 -O0 -code-model=large -fast-isel=false -mattr=+vsx <%s | FileCheck -check-prefix=LARGE-VSX %s 31 ; LARGE: [[VAR:[a-z0-9A-Z_.]+]]: 32 ; LARGE: .quad 4562098671269285104 33 ; LARGE-LABEL: test_double_const: 34 ; LARGE: addis [[REG1:[0-9]+]], 2, [[VAR2:[a-z0-9A-Z_.]+]]@toc@ha 35 ; LARGE: ld [[REG2:[0-9]+]], [[VAR2]]@toc@l([[REG1]]) 36 ; LARGE: lfd {{[0-9]+}}, 0([[REG2]]) 38 ; LARGE-VSX: [[VAR:[a-z0-9A-Z_.]+]]: 39 ; LARGE-VSX: .quad 4562098671269285104 [all …]
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/external/llvm-project/llvm/test/CodeGen/AArch64/GlobalISel/ |
D | select-blockaddress.mir | 3 …machineinstrs -run-pass=instruction-select -code-model=large %s | FileCheck %s --check-prefix=LARGE 39 ; LARGE-LABEL: name: test_blockaddress 40 ; LARGE: bb.0 (%ir-block.0): 41 …; LARGE: [[MOVZXi:%[0-9]+]]:gpr64 = MOVZXi target-flags(aarch64-g0, aarch64-nc) blockaddress(@te… 42 …; LARGE: [[MOVKXi:%[0-9]+]]:gpr64 = MOVKXi [[MOVZXi]], target-flags(aarch64-g1, aarch64-nc) bloc… 43 …; LARGE: [[MOVKXi1:%[0-9]+]]:gpr64 = MOVKXi [[MOVKXi]], target-flags(aarch64-g2, aarch64-nc) blo… 44 …; LARGE: [[MOVKXi2:%[0-9]+]]:gpr64 = MOVKXi [[MOVKXi1]], target-flags(aarch64-g3) blockaddress(@… 45 ; LARGE: [[MOVZXi1:%[0-9]+]]:gpr64 = MOVZXi target-flags(aarch64-g0, aarch64-nc) @addr, 0 46 …; LARGE: [[MOVKXi3:%[0-9]+]]:gpr64 = MOVKXi [[MOVZXi1]], target-flags(aarch64-g1, aarch64-nc) @a… 47 …; LARGE: [[MOVKXi4:%[0-9]+]]:gpr64 = MOVKXi [[MOVKXi3]], target-flags(aarch64-g2, aarch64-nc) @a… [all …]
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