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/external/llvm-project/llvm/test/MC/RISCV/
Dfixups-compressed.s8 .LBB0_2: label
9 # CHECK-FIXUP: fixup A - offset: 0, value: .LBB0_2, kind: fixup_riscv_rvc_jump
11 c.j .LBB0_2
15 # CHECK-FIXUP: fixup A - offset: 0, value: .LBB0_2, kind: fixup_riscv_rvc_branch
17 c.beqz a3, .LBB0_2
18 # CHECK-FIXUP: fixup A - offset: 0, value: .LBB0_2, kind: fixup_riscv_rvc_branch
20 c.bnez a5, .LBB0_2
/external/llvm-project/llvm/test/CodeGen/X86/
Dfp-une-cmp.ll10 ; jnp LBB0_2
13 ; LBB0_2:
19 ; jne LBB0_2
20 ; jp LBB0_2
22 ; LBB0_2:
30 ; CHECK-NEXT: jne .LBB0_2
31 ; CHECK-NEXT: jp .LBB0_2
34 ; CHECK-NEXT: .LBB0_2: # %bb2
Dstack-protector-3.ll11 ; CHECK-TLS-FS-40-NEXT: jne .LBB0_2
12 ; CHECK-TLS-FS-40: .LBB0_2:
19 ; CHECK-GS-NEXT: jne .LBB0_2
20 ; CHECK-GS: .LBB0_2:
27 ; CHECK-OFFSET-NEXT: jne .LBB0_2
28 ; CHECK-OFFSET: .LBB0_2:
35 ; CHECK-GLOBAL-NEXT: jne .LBB0_2
36 ; CHECK-GLOBAL: .LBB0_2:
Daddr-mode-matcher-2.ll34 ; X86-NEXT: .LBB0_2: # =>This Inner Loop Header: Depth=1
40 ; X86-NEXT: jmp .LBB0_2
53 ; X64-NEXT: .LBB0_2: # =>This Inner Loop Header: Depth=1
59 ; X64-NEXT: jmp .LBB0_2
Davx-select.ll10 ; X86-NEXT: je .LBB0_2
13 ; X86-NEXT: .LBB0_2:
21 ; X64-NEXT: je .LBB0_2
24 ; X64-NEXT: .LBB0_2:
Dabsolute-cmp.ll18 ; NOPIC-NEXT: ja .LBB0_2 # encoding: [0x77,A]
19 ; NOPIC-NEXT: # fixup A - offset: 1, value: .LBB0_2-1, kind: FK_PCRel_1
27 ; NOPIC-NEXT: .LBB0_2: # %f
34 ; PIC-NEXT: ja .LBB0_2 # encoding: [0x77,A]
35 ; PIC-NEXT: # fixup A - offset: 1, value: .LBB0_2-1, kind: FK_PCRel_1
43 ; PIC-NEXT: .LBB0_2: # %f
Drtm.ll13 ; X86-NEXT: xbegin .LBB0_2
16 ; X86: .LBB0_2: # %entry
22 ; X64-NEXT: xbegin .LBB0_2
25 ; X64: .LBB0_2: # %entry
Dindirect-branch-tracking-eh.ll16 ; X86_64-NEXT: .LBB0_2: # %lpad
32 ; X86-NEXT: .LBB0_2: # %lpad
46 ; SJLJ: LBB0_2: # %try.cont
64 ; SJLJ: jmp LBB0_2
Dlsr-static-addr.ll16 ; CHECK-NEXT: .LBB0_2: # %for.body
23 ; CHECK-NEXT: jne .LBB0_2
35 ; ATOM-NEXT: .LBB0_2: # %for.body
42 ; ATOM-NEXT: jne .LBB0_2
Dtestb-je-fusion.ll22 ; NOFUSION_NOPOSTRA-NEXT: je .LBB0_2
25 ; NOFUSION_NOPOSTRA-NEXT: .LBB0_2: # %if.end
33 ; BRANCHFUSION_NOPOSTRA-NEXT: je .LBB0_2
36 ; BRANCHFUSION_NOPOSTRA-NEXT: .LBB0_2: # %if.end
44 ; NOFUSION_POSTRA-NEXT: je .LBB0_2
47 ; NOFUSION_POSTRA-NEXT: .LBB0_2: # %if.end
55 ; BRANCHFUSION_POSTRA-NEXT: je .LBB0_2
58 ; BRANCHFUSION_POSTRA-NEXT: .LBB0_2: # %if.end
66 ; NOFUSION_MISCHEDPOSTRA-NEXT: je .LBB0_2
69 ; NOFUSION_MISCHEDPOSTRA-NEXT: .LBB0_2: # %if.end
[all …]
Dpr32256.ll19 ; CHECK-NEXT: jmp .LBB0_2
24 ; CHECK-NEXT: jmp .LBB0_2
25 ; CHECK-NEXT: .LBB0_2: # %land.end
Dstack-clash-dynamic-alloca.ll28 ; CHECK-X86-64-NEXT: .LBB0_2: # =>This Inner Loop Header: Depth=1
32 ; CHECK-X86-64-NEXT: jl .LBB0_2
58 ; CHECK-X86-32-NEXT: .LBB0_2: # =>This Inner Loop Header: Depth=1
62 ; CHECK-X86-32-NEXT: jl .LBB0_2
/external/llvm/test/CodeGen/X86/
Dfp-une-cmp.ll10 ; jnp LBB0_2
13 ; LBB0_2:
19 ; jne LBB0_2
20 ; jp LBB0_2
22 ; LBB0_2:
30 ; CHECK-NEXT: jne .LBB0_2
31 ; CHECK-NEXT: jp .LBB0_2
34 ; CHECK-NEXT: .LBB0_2: # %bb2
/external/llvm-project/llvm/test/CodeGen/RISCV/
Dcmp-bool.ll8 ; RV32-NEXT: beq a0, a1, .LBB0_2
11 ; RV32-NEXT: .LBB0_2: # %if.then
16 ; RV64-NEXT: beq a0, a1, .LBB0_2
19 ; RV64-NEXT: .LBB0_2: # %if.then
Ddouble-stack-spill-restore.ll15 ; RV32IFD-NEXT: beqz a2, .LBB0_2
28 ; RV32IFD-NEXT: .LBB0_2: # %return
43 ; RV64IFD-NEXT: beqz a2, .LBB0_2
52 ; RV64IFD-NEXT: .LBB0_2: # %return
Dshrinkwrap.ll16 ; RV32I-NOSW-NEXT: bgeu a1, a0, .LBB0_2
21 ; RV32I-NOSW-NEXT: .LBB0_2: # %if.then
27 ; RV32I-SW-NEXT: bgeu a1, a0, .LBB0_2
30 ; RV32I-SW-NEXT: .LBB0_2: # %if.then
38 ; RV32I-SW-SR-NEXT: bgeu a1, a0, .LBB0_2
41 ; RV32I-SW-SR-NEXT: .LBB0_2: # %if.then
Dselect-and.ll15 ; RV32I-NEXT: bnez a1, .LBB0_2
18 ; RV32I-NEXT: .LBB0_2:
25 ; RV64I-NEXT: bnez a1, .LBB0_2
28 ; RV64I-NEXT: .LBB0_2:
/external/llvm-project/llvm/test/CodeGen/Mips/indirect-jump-hazard/
Dlong-branch.ll85 ; MIPS64-NEXT: daddiu $1, $zero, %hi(.LBB0_4-.LBB0_2)
87 ; MIPS64-NEXT: bal .LBB0_2
88 ; MIPS64-NEXT: daddiu $1, $1, %lo(.LBB0_4-.LBB0_2)
89 ; MIPS64-NEXT: .LBB0_2: # %entry
111 ; N64-R6-NEXT: daddiu $1, $zero, %hi(.LBB0_4-.LBB0_2)
113 ; N64-R6-NEXT: daddiu $1, $1, %lo(.LBB0_4-.LBB0_2)
114 ; N64-R6-NEXT: balc .LBB0_2
115 ; N64-R6-NEXT: .LBB0_2: # %entry
/external/llvm-project/llvm/test/CodeGen/Mips/
Djump-table-mul.ll26 ; CHECK-NEXT: .LBB0_2: # %sw.bb
56 ; CHECK-NEXT: .gpdword .LBB0_2
59 ; CHECK-NEXT: .gpdword .LBB0_2
61 ; CHECK-NEXT: .gpdword .LBB0_2
/external/llvm-project/llvm/test/CodeGen/PowerPC/
Dbranch_coalesce.ll12 ; CHECK-NEXT: beq 0, .LBB0_2
19 ; CHECK-NEXT: .LBB0_2: # %entry
30 ; CHECK-NOCOALESCE-NEXT: .LBB0_2: # %entry
42 ; CHECK-NOCOALESCE-NEXT: beq 0, .LBB0_2
/external/llvm-project/llvm/test/CodeGen/Thumb2/
Dsegmented-stacks.ll17 ; THUMB-NEXT: blo .LBB0_2
26 ; THUMB-NEXT: .LBB0_2:
45 ; ARM-NEXT: blo .LBB0_2
54 ; ARM-NEXT: .LBB0_2:
/external/llvm/test/MC/COFF/
Dweak.s19 je LBB0_2
25 LBB0_2: # %return label
/external/llvm-project/llvm/test/CodeGen/AArch64/
Dbranch-relax-cbz.ll13 ; CHECK-NEXT: cbnz w8, LBB0_2
15 ; CHECK-NEXT: LBB0_2: ; %b8
21 ; CHECK-NEXT: cbnz w0, LBB0_2
/external/llvm-project/llvm/test/MC/COFF/
Dweak.s19 je LBB0_2
25 LBB0_2: # %return label
/external/llvm-project/llvm/test/CodeGen/X86/GlobalISel/
Dbrcond.ll11 ; X64-NEXT: je .LBB0_2
16 ; X64-NEXT: .LBB0_2: # %if.else
29 ; X86-NEXT: je .LBB0_2
33 ; X86-NEXT: .LBB0_2: # %if.else

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