Searched refs:LDD (Results 1 – 25 of 34) sorted by relevance
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| /external/ltp/testcases/commands/ldd/ |
| D | ldd01.sh | 13 LDD=${LDD:=ldd}
24 …$LDD $LDDTESTFILE | grep -q -E "lddfile1.obj.so|lddfile2.obj.so|lddfile3.obj.so|lddfile4.obj.so|ld…
34 …$LDD -v $LDDTESTFILE | grep -q -E "GLIBC|lddfile1.obj.so|lddfile2.obj.so|lddfile3.obj.so|lddfile4.…
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| /external/harfbuzz_ng/src/ |
| D | check-libstdc++.sh | 12 LDD=ldd
16 LDD="otool -L"
32 if $LDD $so | grep 'libstdc[+][+]\|libc[+][+]'; then
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| /external/llvm/test/CodeGen/SPARC/ |
| D | vector-call.ll | 5 ; for the implementation of LDD
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| /external/llvm-project/llvm/test/CodeGen/SPARC/ |
| D | vector-call.ll | 5 ; for the implementation of LDD
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/BPF/ |
| D | BPFInstrInfo.cpp | 69 LdOpc = BPF::LDD; in expandMEMCPY()
157 BuildMI(MBB, I, DL, get(BPF::LDD), DestReg).addFrameIndex(FI).addImm(0); in loadRegFromStackSlot()
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| D | BPFMISimplifyPatchable.cpp | 109 Opcode == BPF::LDD || Opcode == BPF::STB || Opcode == BPF::STH || in checkADDrr()
242 if (MI.getOpcode() != BPF::LDD && MI.getOpcode() != BPF::LDW && in removeLD()
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| D | BPFInstrInfo.td | 466 def LDD : LOADi64<BPF_DW, "u64", load>;
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| /external/llvm-project/llvm/lib/Target/BPF/ |
| D | BPFInstrInfo.cpp | 69 LdOpc = BPF::LDD; in expandMEMCPY()
157 BuildMI(MBB, I, DL, get(BPF::LDD), DestReg).addFrameIndex(FI).addImm(0); in loadRegFromStackSlot()
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| D | BPFMISimplifyPatchable.cpp | 112 Opcode == BPF::LDD || Opcode == BPF::STB || Opcode == BPF::STH || in checkADDrr()
258 if (MI.getOpcode() != BPF::LDD && MI.getOpcode() != BPF::LDW && in removeLD()
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| /external/llvm/lib/Target/BPF/ |
| D | BPFInstrInfo.cpp | 73 BuildMI(MBB, I, DL, get(BPF::LDD), DestReg).addFrameIndex(FI).addImm(0); in loadRegFromStackSlot()
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| D | BPFInstrInfo.td | 350 def LDD : LOADi64<0x3, "ldd", load>;
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| /external/llvm/lib/Target/AVR/ |
| D | AVRInstrFormats.td | 153 // [STD/LDD] P+q, Rr special encoding: <|10q0|qqtr|rrrr|pqqq>
154 // t = type (1 for STD, 0 for LDD)
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| D | AVR.td | 23 // :TODO: We define all devices with SRAM to have all variants of LD/ST/LDD/STD.
48 // LDD - two variants for Y and Z
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| D | AVRInstrInfo.td | 141 /// Address operand for `reg+imm` used by STD and LDD.
205 // A special operand type for the LDD/STD instructions.
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AVR/ |
| D | AVRInstrFormats.td | 154 // [STD/LDD] P+q, Rr special encoding: <|10q0|qqtr|rrrr|pqqq>
155 // t = type (1 for STD, 0 for LDD)
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| D | AVRDevices.td | 6 // :TODO: We define all devices with SRAM to have all variants of LD/ST/LDD/STD.
30 // LDD - two variants for Y and Z
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| D | AVRInstrInfo.td | 158 /// Address operand for `reg+imm` used by STD and LDD.
247 // A special operand type for the LDD/STD instructions.
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| /external/llvm-project/llvm/lib/Target/Sparc/ |
| D | SparcRegisterInfo.td | 283 // Aliases of the integer registers used for LDD/STD double-word operations
301 // Aliases of the co-processor registers used for LDD/STD double-word operations
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| /external/llvm-project/llvm/lib/Target/AVR/ |
| D | AVRInstrFormats.td | 156 // [STD/LDD] P+q, Rr special encoding: <|10q0|qqtr|rrrr|pqqq>
157 // t = type (1 for STD, 0 for LDD)
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| D | AVRDevices.td | 6 // :TODO: We define all devices with SRAM to have all variants of LD/ST/LDD/STD.
30 // LDD - two variants for Y and Z
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| /external/llvm/lib/Target/Sparc/ |
| D | SparcRegisterInfo.td | 284 // Aliases of the integer registers used for LDD/STD double-word operations
302 // Aliases of the co-processor registers used for LDD/STD double-word operations
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Sparc/ |
| D | SparcRegisterInfo.td | 283 // Aliases of the integer registers used for LDD/STD double-word operations
301 // Aliases of the co-processor registers used for LDD/STD double-word operations
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| /external/pcre/dist2/src/sljit/ |
| D | sljitNativeSPARC_32.c | 237 … FAIL_IF(push_inst(compiler, LDD | DA(reg_index) | S1(SLJIT_SP) | IMM(float_offset), reg_index)); in call_with_args()
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| /external/ImageMagick/PerlMagick/t/reference/write/filter/ |
| D | Sharpen.miff | 48 …Y�}v�kr�hp�q�rv���f��� ����������������������������( TG9\NAUL:WG9JG?QK8VG"LDD��Ţ�홛�����|��l���j��…
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| /external/capstone/arch/M680X/ |
| D | insn_props.inc | 202 { NOG, wrrr, M680X_REG_D, NOR, true, false }, // LDD
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