| /external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/IR/ |
| D | ConstrainedOps.def | 69 FUNCTION(lround, 1, 0, experimental_constrained_lround, LROUND)
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| /external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 643 LROUND, LLROUND, LRINT, LLRINT, enumerator
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| /external/llvm-project/llvm/include/llvm/IR/ |
| D | ConstrainedOps.def | 83 DAG_FUNCTION(lround, 1, 0, experimental_constrained_lround, LROUND)
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| /external/llvm-project/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 813 LROUND, enumerator
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/ |
| D | PPCTargetTransformInfo.cpp | 320 case Intrinsic::lround: Opcode = ISD::LROUND; break; in mightUseCTR()
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| D | PPCISelLowering.cpp | 398 setOperationAction(ISD::LROUND, MVT::f64, Legal); in PPCTargetLowering()
399 setOperationAction(ISD::LROUND, MVT::f32, Legal); in PPCTargetLowering()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGDumper.cpp | 345 case ISD::LROUND: return "lround"; in getOperationName()
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| D | LegalizeFloatTypes.cpp | 785 case ISD::LROUND: Res = SoftenFloatOp_LROUND(N); break; in SoftenFloatOperand()
1666 case ISD::LROUND: Res = ExpandFloatOp_LROUND(N); break; in ExpandFloatOperand()
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| D | LegalizeDAG.cpp | 1005 case ISD::LROUND: in LegalizeOp()
4072 case ISD::LROUND: in ConvertNodeToLibcall()
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| D | SelectionDAGBuilder.cpp | 6208 case Intrinsic::lround: Opcode = ISD::LROUND; break; in visitIntrinsicCall()
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| /external/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGDumper.cpp | 357 case ISD::LROUND: return "lround"; in getOperationName()
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| D | LegalizeFloatTypes.cpp | 823 case ISD::LROUND: Res = SoftenFloatOp_LROUND(N); break; in SoftenFloatOperand()
1756 case ISD::LROUND: Res = ExpandFloatOp_LROUND(N); break; in ExpandFloatOperand()
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| D | LegalizeDAG.cpp | 1004 case ISD::LROUND: in LegalizeOp()
4250 case ISD::LROUND: in ConvertNodeToLibcall()
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| D | SelectionDAGBuilder.cpp | 6096 case Intrinsic::lround: Opcode = ISD::LROUND; break; in visitIntrinsicCall()
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| /external/llvm-project/llvm/lib/Target/PowerPC/ |
| D | PPCTargetTransformInfo.cpp | 479 case Intrinsic::lround: Opcode = ISD::LROUND; break; in mightUseCTR()
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| D | PPCISelLowering.cpp | 500 setOperationAction(ISD::LROUND, MVT::f64, Legal); in PPCTargetLowering()
501 setOperationAction(ISD::LROUND, MVT::f32, Legal); in PPCTargetLowering()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
| D | TargetLoweringBase.cpp | 756 setOperationAction(ISD::LROUND, VT, Expand); in initActions()
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| /external/llvm-project/llvm/lib/CodeGen/ |
| D | TargetLoweringBase.cpp | 877 setOperationAction(ISD::LROUND, VT, Expand); in initActions()
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| /external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/Target/ |
| D | TargetSelectionDAG.td | 469 def lround : SDNode<"ISD::LROUND" , SDTFPToIntOp>;
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| /external/llvm-project/llvm/include/llvm/Target/ |
| D | TargetSelectionDAG.td | 476 def lround : SDNode<"ISD::LROUND" , SDTFPToIntOp>;
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| /external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/AArch64/ |
| D | AArch64GenFastISel.inc | 4008 // FastEmit functions for ISD::LROUND.
4744 case ISD::LROUND: return fastEmit_ISD_LROUND_r(VT, RetVT, Op0, Op0IsKill);
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.cpp | 517 setOperationAction(ISD::LROUND, Ty, Legal); in AArch64TargetLowering()
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| /external/llvm-project/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.cpp | 649 setOperationAction(ISD::LROUND, Ty, Legal); in AArch64TargetLowering()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 664 setOperationAction(ISD::LROUND, MVT::f80, Expand); in X86TargetLowering()
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| /external/llvm-project/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 673 setOperationAction(ISD::LROUND, MVT::f80, Expand); in X86TargetLowering()
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