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Searched refs:LW (Results 1 – 25 of 172) sorted by relevance

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/external/llvm-project/compiler-rt/lib/xray/
Dxray_utils.cpp125 LogWriter *LW = reinterpret_cast<LogWriter *>(InternalAlloc(sizeof(LogWriter))); in Open() local
126 new (LW) LogWriter(Vmo); in Open()
127 return LW; in Open()
130 void LogWriter::Close(LogWriter *LW) { in Close() argument
131 LW->~LogWriter(); in Close()
132 InternalFree(LW); in Close()
188 LogWriter *LW = allocate<LogWriter>();
189 new (LW) LogWriter(Fd);
190 return LW;
193 void LogWriter::Close(LogWriter *LW) {
[all …]
Dxray_basic_logging.cpp88 LogWriter* LW = LogWriter::Open(); in getLog() local
89 if (LW == nullptr) in getLog()
90 return LW; in getLog()
112 LW->WriteAll(reinterpret_cast<char *>(&Header), in getLog()
114 return LW; in getLog()
119 static LogWriter *LW = nullptr; in getGlobalLog() local
120 pthread_once(&OnceInit, +[] { LW = getLog(); }); in getGlobalLog()
121 return LW; in getGlobalLog()
161 LogWriter *LW = getGlobalLog(); in InMemoryRawLog() local
162 if (LW == nullptr) in InMemoryRawLog()
[all …]
Dxray_profiling.cpp244 LogWriter *LW = LogWriter::Open(); in profilingFlush() local
245 if (LW == nullptr) { in profilingFlush()
252 LW->WriteAll(reinterpret_cast<const char *>(B.Data), in profilingFlush()
257 LogWriter::Close(LW); in profilingFlush()
/external/llvm/test/Linker/
Dsubprogram-linkonce-weak.ll2 ; RUN: FileCheck %s -check-prefix=LW -check-prefix=CHECK <%t1
16 ; The LW prefix means linkonce (this file) first, then weak (the other file).
20 ; LW: define i32 @bar({{.*}} !dbg ![[BARSP:[0-9]+]]
21 ; LW: %sum = add i32 %a, %b, !dbg ![[FOOINBAR:[0-9]+]]
22 ; LW: ret i32 %sum, !dbg ![[BARRET:[0-9]+]]
23 ; LW: define weak i32 @foo({{.*}} !dbg ![[WEAKFOOSP:[0-9]+]]
24 ; LW: %sum = call i32 @fastadd(i32 %a, i32 %b), !dbg ![[FOOCALL:[0-9]+]]
25 ; LW: ret i32 %sum, !dbg ![[FOORET:[0-9]+]]
52 ; LW-SAME: !{![[LCU:[0-9]+]], ![[WCU:[0-9]+]]}
56 ; LW: ![[LCU]] = distinct !DICompileUnit(
[all …]
/external/llvm-project/llvm/test/Linker/
Dsubprogram-linkonce-weak.ll2 ; RUN: FileCheck %s -check-prefix=LW -check-prefix=CHECK <%t1
19 ; The LW prefix means linkonce (this file) first, then weak (the other file).
23 ; LW: define i32 @bar({{.*}} !dbg ![[BARSP:[0-9]+]]
24 ; LW: %sum = add i32 %a, %b, !dbg ![[FOOINBAR:[0-9]+]]
25 ; LW: ret i32 %sum, !dbg ![[BARRET:[0-9]+]]
26 ; LW: define weak i32 @foo({{.*}} !dbg ![[WEAKFOOSP:[0-9]+]]
27 ; LW: %sum = call i32 @fastadd(i32 %a, i32 %b), !dbg ![[FOOCALL:[0-9]+]]
28 ; LW: ret i32 %sum, !dbg ![[FOORET:[0-9]+]]
55 ; LW-SAME: !{![[LCU:[0-9]+]], ![[WCU:[0-9]+]]}
59 ; LW: ![[LCU]] = distinct !DICompileUnit(
[all …]
/external/llvm-project/llvm/test/CodeGen/Mips/GlobalISel/instruction-select/
Dgloal_address_pic.mir57 … ; MIPS32: [[LW:%[0-9]+]]:gpr32 = LW [[ADDu]], target-flags(mips-got-call) @f :: (load 4 from got)
61 …; MIPS32: JALRPseudo [[LW]], csr_o32, implicit-def $ra, implicit-def $sp, implicit $a0, implicit $…
98 …; MIPS32: [[LW:%[0-9]+]]:gpr32 = LW [[ADDu]], target-flags(mips-got) @f_with_local_linkage :: (loa…
99 … ; MIPS32: [[ADDiu:%[0-9]+]]:gpr32 = ADDiu [[LW]], target-flags(mips-abs-lo) @f_with_local_linkage
134 ; MIPS32: [[LW:%[0-9]+]]:gpr32 = LW [[ADDu]], target-flags(mips-got) @val :: (load 4 from got)
135 ; MIPS32: [[LW1:%[0-9]+]]:gpr32 = LW [[LW]], 0 :: (load 4 from @val)
155 …; MIPS32: [[LW:%[0-9]+]]:gpr32 = LW [[ADDu]], target-flags(mips-got) @val_with_local_linkage :: (l…
156 …; MIPS32: [[ADDiu:%[0-9]+]]:gpr32 = ADDiu [[LW]], target-flags(mips-abs-lo) @val_with_local_linkage
157 ; MIPS32: [[LW1:%[0-9]+]]:gpr32 = LW [[ADDiu]], 0 :: (load 4 from @val_with_local_linkage)
Dpointers.mir23 ; MIPS32: [[LW:%[0-9]+]]:gpr32 = LW [[COPY]], 0 :: (load 4 from %ir.p)
24 ; MIPS32: $v0 = COPY [[LW]]
47 ; MIPS32: [[LW:%[0-9]+]]:gpr32 = LW [[ADDiu]], 0 :: (load 4 from %fixed-stack.0, align 8)
48 ; MIPS32: [[LW1:%[0-9]+]]:gpr32 = LW [[LW]], 0 :: (load 4 from %ir.p)
Dload.mir24 ; MIPS32FP32: [[LW:%[0-9]+]]:gpr32 = LW [[COPY]], 0 :: (load 4 from %ir.ptr)
25 ; MIPS32FP32: $v0 = COPY [[LW]]
30 ; MIPS32FP64: [[LW:%[0-9]+]]:gpr32 = LW [[COPY]], 0 :: (load 4 from %ir.ptr)
31 ; MIPS32FP64: $v0 = COPY [[LW]]
Dfence.mir21 ; MIPS32: [[LW:%[0-9]+]]:gpr32 = LW [[COPY]], 0 :: (load monotonic 4 from %ir.ptr)
23 ; MIPS32: $v0 = COPY [[LW]]
Dphi.mir153 ; MIPS32FP32: [[LW:%[0-9]+]]:gpr32 = LW [[ADDiu]], 0 :: (load 4 from %fixed-stack.0, align 8)
155 ; MIPS32FP32: [[LW1:%[0-9]+]]:gpr32 = LW [[ADDiu1]], 0 :: (load 4 from %fixed-stack.1)
165 ; MIPS32FP32: [[PHI:%[0-9]+]]:gpr32 = PHI [[COPY1]], %bb.1, [[LW]], %bb.2
178 ; MIPS32FP64: [[LW:%[0-9]+]]:gpr32 = LW [[ADDiu]], 0 :: (load 4 from %fixed-stack.0, align 8)
180 ; MIPS32FP64: [[LW1:%[0-9]+]]:gpr32 = LW [[ADDiu1]], 0 :: (load 4 from %fixed-stack.1)
190 ; MIPS32FP64: [[PHI:%[0-9]+]]:gpr32 = PHI [[COPY1]], %bb.1, [[LW]], %bb.2
308 ; MIPS32FP32: [[LW:%[0-9]+]]:gpr32 = LW [[ADDiu]], 0 :: (load 4 from %fixed-stack.0, align 8)
309 ; MIPS32FP32: [[ANDi:%[0-9]+]]:gpr32 = ANDi [[LW]], 1
328 ; MIPS32FP64: [[LW:%[0-9]+]]:gpr32 = LW [[ADDiu]], 0 :: (load 4 from %fixed-stack.0, align 8)
329 ; MIPS32FP64: [[ANDi:%[0-9]+]]:gpr32 = ANDi [[LW]], 1
Dvar_arg.mir78 ; MIPS32: [[LW:%[0-9]+]]:gpr32 = LW [[ADDiu5]], 0 :: (load 4)
79 ; MIPS32: SW [[LW]], [[ADDiu6]], 0 :: (store 4)
80 ; MIPS32: [[LW1:%[0-9]+]]:gpr32 = LW [[ADDiu6]], 0 :: (load 4 from %ir.aq)
84 ; MIPS32: [[LW2:%[0-9]+]]:gpr32 = LW [[LW1]], 0 :: (load 4 from %ir.2)
86 ; MIPS32: [[LW3:%[0-9]+]]:gpr32 = LW [[ADDiu7]], 0 :: (load 4 from %ir.s)
111 %19:gpr32 = LW %8(p0), 0 :: (load 4)
Djump_table_and_brjt.mir95 …; MIPS32: [[LW:%[0-9]+]]:gpr32 = LW [[ADDu]], target-flags(mips-abs-lo) %jump-table.0 :: (load 4)
96 ; MIPS32: PseudoIndirectBranch [[LW]]
123 …; MIPS32: [[LW1:%[0-9]+]]:gpr32 = LW [[ADDu1]], target-flags(mips-abs-lo) %jump-table.1 :: (load…
159 …; MIPS32_PIC: [[LW:%[0-9]+]]:gpr32 = LW [[ADDu]], target-flags(mips-got) %jump-table.0 :: (load …
161 ; MIPS32_PIC: [[ADDu1:%[0-9]+]]:gpr32 = ADDu [[LW]], [[SLL]]
162 …; MIPS32_PIC: [[LW1:%[0-9]+]]:gpr32 = LW [[ADDu1]], target-flags(mips-abs-lo) %jump-table.0 :: (…
188 …; MIPS32_PIC: [[LW2:%[0-9]+]]:gpr32 = LW [[ADDu]], target-flags(mips-got) %jump-table.1 :: (load…
191 …; MIPS32_PIC: [[LW3:%[0-9]+]]:gpr32 = LW [[ADDu3]], target-flags(mips-abs-lo) %jump-table.1 :: (…
Dselect.mir152 ; MIPS32FP32: [[LW:%[0-9]+]]:gpr32 = LW [[ADDiu]], 0 :: (load 4 from %fixed-stack.0, align 8)
153 ; MIPS32FP32: [[ANDi:%[0-9]+]]:gpr32 = ANDi [[LW]], 1
162 ; MIPS32FP64: [[LW:%[0-9]+]]:gpr32 = LW [[ADDiu]], 0 :: (load 4 from %fixed-stack.0, align 8)
163 ; MIPS32FP64: [[ANDi:%[0-9]+]]:gpr32 = ANDi [[LW]], 1
DtruncStore_and_aExtLoad.mir74 ; MIPS32: [[LW:%[0-9]+]]:gpr32 = LW [[COPY1]], 0 :: (load 4 from %ir.py)
75 ; MIPS32: SW [[LW]], [[COPY]], 0 :: (store 4 into %ir.px)
Dstack_args.mir28 ; MIPS32: [[LW:%[0-9]+]]:gpr32 = LW [[ADDiu]], 0 :: (load 4 from %fixed-stack.0, align 8)
35 ; MIPS32: SW [[LW]], [[COPY4]], 16 :: (store 4 into stack + 16)
Dload_4_unaligned_r6.mir82 …; MIPS32R6: [[LW:%[0-9]+]]:gpr32 = LW [[ADDiu]], 0 :: (dereferenceable load 4 from @i32_align2, al…
83 ; MIPS32R6: $v0 = COPY [[LW]]
Dload_4_unaligned.mir81 …; MIPS32: [[LW:%[0-9]+]]:gpr32 = LW [[ADDiu]], 0 :: (dereferenceable load 4 from @i32_align8, alig…
82 ; MIPS32: $v0 = COPY [[LW]]
/external/libffi/src/tile/
Dtile.S48 #define LW ld macro
52 #define LW lw macro
139 LW TMP, INCOMING_STACK_ARGS
159 LW r0, r0
165 LW REG, PTR ; \
186 LW lr, r52
192 LW RETURN_REG_ADDR, TMP
201 LW r52, TMP
311 LW lr, r10
/external/python/cpython2/Modules/_ctypes/libffi/src/tile/
Dtile.S48 #define LW ld macro
52 #define LW lw macro
139 LW TMP, INCOMING_STACK_ARGS
159 LW r0, r0
165 LW REG, PTR ; \
186 LW lr, r52
192 LW RETURN_REG_ADDR, TMP
201 LW r52, TMP
311 LW lr, r10
/external/libyuv/files/include/libyuv/
Dmacros_msa.h19 #define LW(psrc) \ macro
45 val0_m = LW(psrc_ld_m); \
46 val1_m = LW(psrc_ld_m + 4); \
84 #define LW(psrc) \ macro
110 val0_m = LW(psrc_ld_m); \
111 val1_m = LW(psrc_ld_m + 4); \
/external/libvpx/libvpx/third_party/libyuv/include/libyuv/
Dmacros_msa.h19 #define LW(psrc) \ macro
45 val0_m = LW(psrc_ld_m); \
46 val1_m = LW(psrc_ld_m + 4); \
84 #define LW(psrc) \ macro
110 val0_m = LW(psrc_ld_m); \
111 val1_m = LW(psrc_ld_m + 4); \
/external/llvm-project/llvm/test/CodeGen/Mips/mirparser/
Dtarget-flags-pic-o32.mir78 %2 = LW %1, target-flags(mips-got-call) @_Z1gi :: (load 4 from call-entry @_Z1gi)
85 %5 = LW %1, target-flags(mips-got) @v :: (load 4 from got)
86 %6 = LW killed %5, 0 :: (dereferenceable load 4 from @v)
88 %8 = LW %1, target-flags(mips-got) @j :: (load 4 from got)
89 %9 = LW killed %8, 0 :: (dereferenceable load 4 from @j)
/external/llvm-project/llvm/test/CodeGen/Mips/micromips-sizereduction/
Dmicromips-lwp-swp.mir78 $s0 = LW $sp, 20 :: (load 4 from %stack.2)
79 $s1 = LW $sp, 24 :: (load 4 from %stack.1)
80 $ra = LW $sp, 28 :: (load 4 from %stack.0)
148 $ra = LW $sp, 28 :: (load 4 from %stack.0)
215 $s1 = LW $sp, 24 :: (load 4 from %stack.1)
216 $ra = LW $sp, 28 :: (load 4 from %stack.0)
282 $s0 = LW $sp, 20 :: (load 4 from %stack.2)
284 $ra = LW $sp, 28 :: (load 4 from %stack.0)
/external/libpng/mips/
Dfilter_msa_intrinsics.c45 #define LW(psrc) \ macro
116 #define LW(psrc) \ macro
184 #define LW(psrc) \ macro
472 inp0 = LW(src); in png_read_filter_row_sub4_msa()
513 inp0 = LW(src); in png_read_filter_row_sub3_msa()
554 inp0 = LW(pp); in png_read_filter_row_avg4_msa()
556 inp1 = LW(src); in png_read_filter_row_avg4_msa()
609 inp0 = LW(pp); in png_read_filter_row_avg3_msa()
611 inp1 = LW(src); in png_read_filter_row_avg3_msa()
670 inp0 = LW(nxt); in png_read_filter_row_paeth4_msa()
[all …]
/external/llvm-project/llvm/test/CodeGen/Mips/GlobalISel/regbankselect/
Dvar_arg.mir76 ; MIPS32: [[LW:%[0-9]+]]:gpr32 = LW [[FRAME_INDEX4]](p0), 0 :: (load 4)
77 ; MIPS32: SW [[LW]], [[FRAME_INDEX5]](p0), 0 :: (store 4)
109 %19:gpr32 = LW %8(p0), 0 :: (load 4)

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