| /external/llvm/include/llvm/MC/ |
| D | MCInstrItineraries.h | 100 unsigned LastStage; ///< Index of last + 1 stage in itinerary member
133 (Itineraries[ItinClassIndx].LastStage == ~0U)); in isEndMarker()
144 unsigned StageIdx = Itineraries[ItinClassIndx].LastStage; in endStage()
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| /external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/MC/ |
| D | MCInstrItineraries.h | 98 uint16_t LastStage; ///< Index of last + 1 stage in itinerary member
128 (Itineraries[ItinClassIndx].LastStage == UINT16_MAX)); in isEndMarker()
139 unsigned StageIdx = Itineraries[ItinClassIndx].LastStage; in endStage()
|
| /external/llvm-project/llvm/include/llvm/MC/ |
| D | MCInstrItineraries.h | 101 uint16_t LastStage; ///< Index of last + 1 stage in itinerary member
131 (Itineraries[ItinClassIndx].LastStage == UINT16_MAX)); in isEndMarker()
142 unsigned StageIdx = Itineraries[ItinClassIndx].LastStage; in endStage()
|
| /external/llvm-project/llvm/lib/Target/AMDGPU/ |
| D | GCNSchedStrategy.h | 72 LastStage = ClusteredLowOccupancyReschedule enumerator
|
| D | GCNSchedStrategy.cpp | 612 } while (Stage != LastStage); in finalizeSchedule()
|
| /external/llvm-project/llvm/include/llvm/CodeGen/ |
| D | ModuloSchedule.h | 190 void generateProlog(unsigned LastStage, MachineBasicBlock *KernelBB,
192 void generateEpilog(unsigned LastStage, MachineBasicBlock *KernelBB,
|
| /external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
| D | ModuloSchedule.h | 184 void generateProlog(unsigned LastStage, MachineBasicBlock *KernelBB,
186 void generateEpilog(unsigned LastStage, MachineBasicBlock *KernelBB,
|
| /external/pdfium/third_party/lcms/src/ |
| D | cmsvirt.c | 1150 cmsStage* LastStage; in cmsTransform2DeviceLink() local
1161 LastStage = cmsPipelineGetPtrToLastStage(LUT); in cmsTransform2DeviceLink()
1162 if (LastStage != NULL && LastStage ->Type != cmsSigCurveSetElemType) in cmsTransform2DeviceLink()
|
| /external/llvm-project/llvm/lib/CodeGen/ |
| D | ModuloSchedule.cpp | 190 void ModuloScheduleExpander::generateProlog(unsigned LastStage, in generateProlog() argument
200 for (unsigned i = 0; i < LastStage; ++i) { in generateProlog()
248 void ModuloScheduleExpander::generateEpilog(unsigned LastStage, in generateEpilog() argument
275 int EpilogStage = LastStage + 1; in generateEpilog()
276 for (unsigned i = LastStage; i >= 1; --i, ++EpilogStage) { in generateEpilog()
289 for (unsigned StageNum = i; StageNum <= LastStage; ++StageNum) { in generateEpilog()
305 InstrMap, LastStage, EpilogStage, i == 1); in generateEpilog()
307 LastStage, EpilogStage, i == 1); in generateEpilog()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
| D | ModuloSchedule.cpp | 191 void ModuloScheduleExpander::generateProlog(unsigned LastStage, in generateProlog() argument
201 for (unsigned i = 0; i < LastStage; ++i) { in generateProlog()
249 void ModuloScheduleExpander::generateEpilog(unsigned LastStage, in generateEpilog() argument
276 int EpilogStage = LastStage + 1; in generateEpilog()
277 for (unsigned i = LastStage; i >= 1; --i, ++EpilogStage) { in generateEpilog()
290 for (unsigned StageNum = i; StageNum <= LastStage; ++StageNum) { in generateEpilog()
306 InstrMap, LastStage, EpilogStage, i == 1); in generateEpilog()
308 LastStage, EpilogStage, i == 1); in generateEpilog()
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| /external/llvm/lib/CodeGen/ |
| D | MachinePipeliner.cpp | 367 void generateProlog(SMSchedule &Schedule, unsigned LastStage,
370 void generateEpilog(SMSchedule &Schedule, unsigned LastStage,
2287 void SwingSchedulerDAG::generateProlog(SMSchedule &Schedule, unsigned LastStage, in generateProlog() argument
2300 for (unsigned i = 0; i < LastStage; ++i) { in generateProlog()
2349 void SwingSchedulerDAG::generateEpilog(SMSchedule &Schedule, unsigned LastStage, in generateEpilog() argument
2376 int EpilogStage = LastStage + 1; in generateEpilog()
2377 for (unsigned i = LastStage; i >= 1; --i, ++EpilogStage) { in generateEpilog()
2390 for (unsigned StageNum = i; StageNum <= LastStage; ++StageNum) { in generateEpilog()
2396 MachineInstr *NewMI = cloneInstr(In, EpilogStage - LastStage, 0); in generateEpilog()
2404 VRMap, InstrMap, LastStage, EpilogStage, i == 1); in generateEpilog()
[all …]
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| /external/llvm-project/llvm/lib/Target/Hexagon/MCTargetDesc/ |
| D | HexagonMCInstrInfo.cpp | 429 int Size = II[SchedClass].LastStage - II[SchedClass].FirstStage; in getCVIResources()
435 unsigned Stage = II[SchedClass].LastStage - 1; in getCVIResources()
465 Stage < II[SchedClass].LastStage; ++Stage) { in getOtherReservedSlots()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/MCTargetDesc/ |
| D | HexagonMCInstrInfo.cpp | 420 Stage < II[SchedClass].LastStage; ++Stage) { in getOtherReservedSlots()
|
| /external/llvm/utils/TableGen/ |
| D | SubtargetEmitter.cpp | 575 Intinerary.LastStage << ", " << in EmitItineraries()
|
| /external/llvm-project/llvm/utils/TableGen/ |
| D | SubtargetEmitter.cpp | 596 Intinerary.LastStage << ", " << in EmitItineraries()
|